Patent classifications
H03F2203/45588
HIGHLY LINEAR INPUT AND OUTPUT RAIL-TO-RAIL AMPLIFIER
An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.
Reducing offset of a differential signal output by a capacitive coupling stage of a hard disk drive preamplifier
A preamplifier comprises an input stage and a capacitive coupling stage. The input stage is arranged to receive a differential signal from a magnetic resistor which indicates a magnetic field sensed on a magnetic disk of a hard disk drive (HDD) when the preamplifier is powered on from an off state. The capacitive coupling stage has an input arranged to receive the differential signal from the input stage, a filter comprising a first resistor, a second resistor, a first capacitor, a second capacitor, and switches arranged in parallel with respective resistors, where the switches are closed when the preamplifier is powered on from the off state to an on state. A switch control is arranged to determine that an offset of the differential signal has settled and open the switches based on the determination.
Amplifier offset cancellation using amplifier supply voltage
In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
OFFSET CANCELLATION
Apparatus for performing offset cancellation is disclosed. The apparatus comprises a gating circuit (6) for receiving an analogue signal (3) from a source (2) and providing a gated analogue signal (9) to an analogue circuit (10), a gating controller (7; 14; FIG. 1) and a digital processor (14; FIG. 1) for receiving a digital signal (13) converted from an analogue output (11) from the analogue circuit (10). The gating circuit comprises at least one path (21.sub.1), each path respectively comprising, an input terminal (22.sub.1), an output terminal (23.sub.1), a node (24.sub.1) interposed between the input and output terminals, a first transistor (Q1) having a channel arranged between the input terminal and the node, and a second transistor (Q3) having channel arranged between the node and a fixed reference, such as ground (GND). The gating controller is configured, in a first time window (15.sub.A), to switch the first transistor so that the input terminal and the output terminal are decoupled and to switch the second transistor so that the node is coupled to the fixed reference. The gating controller is configured, in a second, different time window (15.sub.B), to switch the second transistor so that the node and the fixed reference are decoupled and to switch the first transistor so that the input terminal is coupled to the input terminal. The digital processor is configured, in the first time window, to take a first measurement of the digital signal, and, in the second, different time window, to take a second measurement of the digital signal. The digital processor configured to subtract the first measurement from the second measurement.
BIDIRECTIONAL LEAKAGE COMPENSATION CIRCUITS FOR USE IN INTEGRATED CIRCUITS AND METHOD THEREFOR
A leakage compensation circuit includes a buffer amplifier, a link coupling element, and a leakage compensation element. The buffer amplifier has an input coupled to a sense node, and an output. The link coupling element has an input coupled to the output of the buffer amplifier, and an output, wherein the link coupling element is unidirectional in a direction from the input to the output thereof. The leakage compensation element has a first current terminal coupled to the sense node, a control terminal coupled to the output of the link coupling element, and a second current terminal coupled to a reference voltage terminal.
A CIRCUIT ARRANGEMENT AND A METHOD FOR OPERATING A CIRCUIT ARRANGEMENT
A circuit arrangement comprises a first input node, a first output node, a sampling capacitor means and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means in the first switching state.
READ-OUT CIRCUITRY FOR ACQUIRING A MULTI-CHANNEL BIOPOTENTIAL SIGNAL AND A SENSOR FOR SENSING A BIOPOTENTIAL SIGNAL
A read-out circuitry for acquiring a multi-channel biopotential signal, comprises: a plurality of read-out signal channels, each receiving an input signal from a unique signal electrode; a reference channel receiving a reference signal from a reference electrode; wherein each read-out signal channel and the reference channel comprises a channel amplifier connected to receive the input signal in a first input node and with an output node connected to a second input node via a channel feedback loop; wherein each signal channel amplifier comprises a capacitor between the second input nodes of the signal channel amplifier and the reference channel amplifier, and wherein each signal channel feedback loop and the reference channel feedback loop comprise a filter.
Reducing Offset of a Differential Signal Output by a Capacitive Coupling Stage of a Hard Disk Drive Preamplifier
A preamplifier comprises an input stage and a capacitive coupling stage. The input stage is arranged to receive a differential signal from a magnetic resistor which indicates a magnetic field sensed on a magnetic disk of a hard disk drive (HDD) when the preamplifier is powered on from an off state. The capacitive coupling stage has an input arranged to receive the differential signal from the input stage, a filter comprising a first resistor, a second resistor, a first capacitor, a second capacitor, and switches arranged in parallel with respective resistors, where the switches are closed when the preamplifier is powered on from the off state to an on state. A switch control is arranged to determine that an offset of the differential signal has settled and open the switches based on the determination.
SAMPLING CIRCUIT AND SAMPLING METHOD
Sampling circuits and methods for sampling are provided. In a first operating phase, sampling capacitors are coupled to inputs, and in a second operating phase, to a common-mode signal.
Amplifier offset and compensation
An apparatus includes a first amplifier, a second amplifier, and a compensation-setting generator to generate a first amplifier compensation setting and second amplifier compensation setting. A controller is operable to: i) apply the first amplifier compensation setting to the first amplifier and apply the second amplifier compensation setting to the second amplifier. The controller is further operable to switch between generating updates to the first amplifier compensation setting and the second amplifier compensation setting.