Patent classifications
H03F2203/45591
SENSOR BIAS CIRCUIT FOR IMPROVED NOISE PERFORMANCE
Techniques for improving noise performance while processing signals received from an electrochemical sensor are provided. In an example, an interface circuit can include a first amplifier configured to provide a voltage to a counter electrode of an electrochemical sensor, a second amplifier configured to receive sensor information from a working electrode of the electrochemical sensor and to provide concentration information using the sensor information. In certain examples, an input of the first amplifier can be directly coupled to an input of the second amplifier to attenuate noise, of either the first amplifier or the second amplifier, within the concentration information provided by the second amplifier.
CONTROL OF SWITCHES IN A VARIABLE IMPEDANCE ELEMENT
In accordance with embodiments of the present disclosure, a system may include a buffer and a switch coupled between the buffer and a voltage supply such that the switch controls a varying voltage at a varying voltage node coupled to the buffer.
CIRCUITS FOR WIRELESS COMMUNICATION ON MULTIPLE FREQUENCY BANDS
Circuit for wireless communication are provided, the circuits comprising: a first quadrature hybrid having a first in port, a first iso port, a first cpl port, and a first thru port; a first mixer having a first input coupled to the first cpl port and having an output; a second mixer have a first input coupled to the first cpl port and having an output; a third mixer having a first input coupled to the first thru port and having an output; a fourth mixer having a first input coupled to the first thru port and having an output; and a first complex combiner having inputs coupled to the output of the first mixer, the output of the second mixer, the output of the third mixer, and the output of the fourth mixer that provides first I and Q outputs based the output of the first mixer and the output of the second mixer.
Multistage amplifier
Provided is a multistage amplifier that can achieve both utilizing in a broad bandwidth and suppressing gain reduction. The multistage amplifier includes a plurality of differential amplifiers which are connected in series; and a direct-current component limiter that cuts off a direct-current component of input signals, in which the direct-current component limiter is disposed between the plurality of differential amplifiers, and in which a transistor size of a first differential amplifier which is disposed immediately after the direct-current component limiter is equal to or greater than a transistor size of a second differential amplifier which is disposed two stages before the direct-current component limiter.
TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER
The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.
Amplifier circuit and amplifier circuit IC chip
An amplifier circuit includes a converter configured to convert a predefined physical quantity to a resistance value, and the resistance value converted by the converter is converted to a voltage value and then amplified. The converter includes variable resistance sensors of piezoresistance elements. A bias unit is configured to determine a bias current of the converter, and includes bias resistances. An operation amplifier unit receives, as input signals, output signals from the bias unit and the converter, and includes feedback resistances respectively connected to input and output ends of a first operational amplifier. The first operational amplifier is a whole differential operational amplifier including a common-mode feedback circuit.
Semiconductor integrated circuit, variable gain amplifier, and sensing system
A semiconductor integrated circuit includes a first pad provided on one end side of a first resistive element and one end side of a second resistive element externally provided, a second pad provided on a different end side of the first resistive element, a third pad provided on a different end side of the second resistive element and one end side of a third resistive element externally provided, an operation amplifier, a first signal line, wired between an output terminal of the operation amplifier and the first pad, a second signal line wired between an inverting input terminal of the operation amplifier and the second pad, a third signal line wired between the inverting input terminal of the operational amplifier and the third pad, a first ESD protection element, provided to the first signal line, a fourth signal line, through which a voltage signal of the first pad.
Variable gain amplifier and method of operating the same
The inventive concepts relate to variable gain amplifiers. The variable gain amplifier including an amplifier, a first fixed resistor and a first variable resistor, a second fixed resistor and a second variable resistor, a third fixed resistor and a third variable resistor, a fourth fixed resistor and a fourth variable resistor, a first output terminal and a second output terminal, and a decoder may be provided. The decoder is configured to receive first control bits, generate second control bits from the first control bits, generate third and fourth control bits from the first or second control bits, respectively, transmit the first control bits and the third control bits to the third and fourth variable resistors to adjust resistance values, and transmit the second and fourth control bits to first and second variable resistors to adjust resistance values.
Apparatus and method to balance the parasitic capacitances between metal tracks on an integrated circuit chip
Embodiments of the present disclosure provide apparatuses and methods for balancing parasitic capacitances between metal tracks in an integrated circuit chip. Specifically, additional capacitances in the form of, for example, tab capacitors, are attached to the metal tracks with the intention of detaching a select number of the attached capacitances for the purpose of balancing the parasitic capacitances between the metal tracks. The attached capacitances may be structural metal elements. Further, the attached structural metal elements may be detachable at thin-film resistive material associated with each of the attached structural metal elements.
Phantom-powered inline preamplifier with variable impedance loading and adjustable interface
Phantom-powered inline preamplifiers capable of variable impedance loading are disclosed with unique adjustable interfaces. By enabling a user to adjust impedance loading from an actively-powered audio preamplifier which takes a microphone electrical signal or another sound source signal as an input, this unique audio preamplifier design with various adjustable impedance loading interface configurations can change sound characteristics according to the user's preference in a recording, production, or live concert environment. In addition, a high pass filter incorporated in a preamplifier with the variable impedance loading feature allows the user to further customize sound characteristics in the recording environment. This novel inline preamplifier, which may be standalone or integrated into a microphone casing, is powered via a microphone cable from a component (e.g. another preamplifier) providing the phantom power. This inline preamplifier may be connected to a conventional microphone and receive phantom-power into the inline preamplifier from a conventional preamplifier.