The present disclosure provides a power amplifier and an electrical device. The two-stage power amplifier architecture is tuned staggered before power combining. A previous stage matching network and its input matching are split into a cascaded staggered tuning, such that the center frequency is at frequency point 1 less than the design frequency point and frequency point 2 greater than design frequency point, and then the power combining stage is tuned at the design frequency point. At advanced process nodes (such as 65 nm or below), compared with the known architecture, in-band signal quality and out-of-band filtering effect of the power amplifier chip integrating this architecture will be better when using the same number of transformers (same area), the reliability will be better. Due to its good flatness within the band, this architecture is especially suitable for carrier aggregation communication occasions.

A radio frequency (RF) power combiner includes a first port with a first inverting input and a first non-inverting input, a second port with a second inverting input and a second non-inverting input, a first stabilization line coupled between the first non-inverting input and second non-inverting input, and a second stabilization line coupled between the first inverting input and the second inverting input.

An improved transformer based switch for PALNA applications. The transformer based switch having an input single pole port and a circuit with at least one transformer and at least one switch configured to connect portions of the transformer to ground or to short the transformer. The primary side of the transformer being connected to the input port and the secondary side of the transformer being connected to an output port.

A transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The transistor amplifier exhibits improved input impedance and improved linearity.

Microwave amplifiers tolerant to electrical overstress are provided. In certain embodiments, a monolithic microwave integrated circuit (MMIC) includes a signal pad that receives a radio frequency (RF) signal, a ground pad, a balun including a primary section that receives the RF signal and a secondary section that outputs a differential RF signal, an amplifier that amplifies the differential RF signal, and a plurality of decoupling elements, some of them electrically connected between the primary section and the ground pad, others electrically connected in the secondary section to a plurality of the amplifier's nodes, and operable to protect the amplifier from electrical overstress. Such electrical overstress events can include electrostatic discharge (ESD) events, such as field-induced charged-device model (FICDM) events, as well as other types of overstress conditions.

Techniques are disclosed implementing a tunable transformer with additional taps in at least one of the three coils. The tunable transformer enables the resonant frequency within RF transceiver matching networks to be adjusted without substantially impacting the output power at resonance. The tunability of the transformer is partially driven by the insertion of additional coils within the transformer, which are selectively switched and may be further coupled with a tunable capacitance. The tunability of the transformer is further driven via the use of at least one multi-tap transformer coil, which allows electronic components to be coupled to different coil taps to thereby facilitate an adjustable DC inductance. Doing so counteracts changes in mutual inductance between the non-switched coils, and facilitates the stabilization of output power with shifts in resonant frequency.

In an exemplary structure, a transformer has a primary side and a secondary side. Output from the primary side is coupled to the secondary side. A first power supply is connected to a center tap of the primary side of the transformer. An oscillator includes a first transistor and a second transistor. The front-gate of the first transistor is connected to the drain of the second transistor and the primary side of the transformer. The front-gate of the second transistor is connected to the drain of the first transistor and the primary side of the transformer. A third transistor is connected to the first transistor and a fourth transistor is connected to the second transistor. The third and fourth transistors inject a desired frequency to the oscillator. A voltage source is connected to the back-gate of the first transistor and the back-gate of the second transistor.

An apparatus, comprising an input transformer; a first differential transistor pair configured to receive a first back gate bias voltage; a second differential transistor pair configured to receive a second back gate bias voltage; a cross-coupled neutralization cap comprising PMOS or NMOS transistors and configured to receive a third back gate bias voltage; and an output transformer. A method of fixing at least one back gate bias voltage to impart a desired capacitance to the transistors of at least one of the first differential transistor pair, the second differential transistor pair, or the neutralization cap. The apparatus and method may provide a power amplifier having improved linearity and efficiency.

An illustrative embodiment of an integrated circuit configured for galvanically isolated signaling includes a transfer conductor carrying a modulated carrier signal. A floating transfer loop is electromagnetically coupled to the transfer conductor to receive the modulated carrier signal. The floating transfer loop includes a primary of a step-up transformer. A receiver is coupled to a secondary of the step-up transformer to receive the modulated carrier signal in an amplified, differential fashion, and to demodulate the modulated carrier signal to obtain a digital receive signal.

The present disclosure provides a power amplifier and an electrical device. The two-stage power amplifier architecture is tuned staggered before power combining. A previous stage matching network and its input matching are split into a cascaded staggered tuning, such that the center frequency is at frequency point 1 less than the design frequency point and frequency point 2 greater than design frequency point, and then the power combining stage is tuned at the design frequency point. At advanced process nodes (such as 65 nm or below), compared with the known architecture, in-band signal quality and out-of-band filtering effect of the power amplifier chip integrating this architecture will be better when using the same number of transformers (same area), the reliability will be better. Due to its good flatness within the band, this architecture is especially suitable for carrier aggregation communication occasions.