Patent classifications
H03F2203/45652
CAPACITIVE AMPLIFIER WITH LOW KICKBACK FROM SWITCHABLE FEEDBACK CAPACITORS
A capacitive amplifier device and technique for mitigating the perturbation within the switchable terminals of a feedback capacitor which is produced by the switching activity performed as part of the device's operation. The capacitive amplifier contains feedback components which can be switched without producing significant kickback or poorly behaved transitions due to the inclusion of at least one dedicated circuit. The dedicated circuit is a kickback limiter circuitry which is connected to a switchable node and is designed to reduce the kickback. The technique for reducing the kickback produced can be achieved by connecting and activating the kickback limiter circuitry.
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Compact high gain amplifier with DC coupled stages
An amplifier system with high gain, compact size, and extended bandwidth is disclosed. The amplifier system includes one or more inputs configured to receive one or more input signals and a pre-driver configured to receive the one or more input signals. The pre-driver may comprise source connected FETs which create a virtual ground and may include inductors which cancel or counter parasitic capacitance of the FETs. The pre-driver amplifies the one or more input signals to create one or more pre-amplified signals, which are provided to a voltage divider network configured to reduce a DC bias voltage of the one or more pre-amplified signals, while maintaining a wide bandwidth range. An amplifier receives and amplifies the output of the voltage divider network to create amplified signals. The amplifier may comprise mirrored FET pairs in a common source configuration and a common gate arrangement.
Voltage gain amplifier architecture for automotive radar
Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.
SHAPER CIRCUIT, PHOTON COUNTING CIRCUIT AND X-RAY APPARATUS
A shaper circuit includes a first amplifier including an input and an output, the input being configured to receive an input signal, which includes one or more current pulses, a feedback component coupled to the output and to the input of the first amplifier thereby forming a feedback loop of the first amplifier, and an RC component coupled to the output of the first amplifier and to a reference potential terminal. Therein the shaper circuit is configured to provide an output signal as a function of the input signal, the output signal including one or more voltage pulses, and the RC component is configured to largely cancel a low frequency pole of the feedback loop of the first amplifier.
VARIABLE-GAIN AMPLIFIER, CORRESPONDING DEVICE AND METHOD
A circuit includes an amplifier and a feedback network coupled between the input and the output of the amplifier. The feedback network includes a plurality of parallel coupled branches, each branch having a first selection switch coupled to the input, a second selection switch coupled to the output, and an impedance between the first and second selection switches. Each branch includes a plurality of signal feedback paths coupled in parallel, each having a tuning switch coupled between the first selection switch and the second selection switch of that branch. A control unit is coupled to the feedback network and configured to vary a gain of the amplifier by selectively placing the first and second selection switches of each branch in a conductive state or a non-conductive state and selectively activating respective tuning switches of any branch having first and second selection switches in the conductive state.
Comparator low power response
In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.
ULTRA-HIGH BANDWIDTH INDUCTORLESS AMPLIFIER
An amplifier has a first amplifying circuit configured to receive a voltage input and to output an amplified current, a second amplifying circuit configured to receive the amplified current and to output an amplified voltage, the second amplifying circuit comprising a pair of feedback resistive elements, each feedback resistive element being coupled to a gate and drain of a corresponding transistor in a pair of output transistors in the second amplifying circuit, and a feedback circuit configured to provide a negative feedback loop between an input and an output of the pair of output transistors, the feedback circuit including a first transconductance amplification circuit and a first equalizing circuit.
Apparatus for integrated offset voltage for photodiode current amplifier
An example apparatus includes: a first voltage source, a first amplifier having a noninverting input adapted to be coupled to a photodiode anode and coupled to the first voltage source, an inverting input adapted to be coupled to a photodiode cathode, and an output, a first resistor coupled to the first amplifier inverting input and to the first amplifier output, a first capacitor coupled to the inverting input of the first amplifier and the first amplifier output, and a second voltage source different from the first voltage source. There is a second amplifier having a noninverting input, an inverting input and an output. The noninverting input is coupled to the output of the first amplifier, the inverting input is coupled to the second voltage source, and there is a second resistor coupled to the inverting input and the output of the second amplifier.
Harmonic rejection mixing circuit device and receiver
The present disclosure discloses a harmonic rejection mixing circuit device and a receiver. In the harmonic rejection mixing circuit device, outputs of first and fourth mixers are combined with the input terminal of the fourth mixer being connected to a capacitor, the first mixer samples a first group of local oscillator (LO) signals, and the fourth mixer phase-invertedly samples the first group of LO signals, thus the noise introduced by a fundamental LO signal input to the first mixer may be eliminated using the double balance feature of the fourth mixer core, thereby ensuring a high signal-to-noise ratio of the receiver. Similarly, the noises introduced by fundamental LO signals input to second and third mixers may be eliminated respectively using the double balance features of the fifth and sixth mixer cores, thereby lowering the noise figure to ensure a high signal-to-noise ratio of the receiver.
OPERATIONAL AMPLIFIER, CHIP, AND ELECTRONIC DEVICE
This application provides an operational amplifier that increases the stability and settling speed of a common-mode feedback circuit. The operational amplifier includes N stages of amplifiers connected in series and M common-mode feedback circuits, where N and M are integers, N≥3, and N≥M>1. An i.sup.th common-mode feedback circuit in the M common-mode feedback circuits is configured to: detect a common-mode output voltage of a (j+b).sup.th stage of amplifier, and regulate an electrical parameter of at least one of the j.sup.th stage of amplifier to the (j+b).sup.th stage of amplifier, to stabilize the common-mode output voltage of the (j+b).sup.th stage of amplifier. An M.sup.th common-mode feedback circuit is configured to detect and stabilize a common-mode output voltage of an N.sup.th stage of amplifier. Herein i, j, and b are integers, M≥i≥1, N≥j≥1, i≥j, j+b≤N, and b≥0.