A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.

A comparison circuit includes a preliminary amplification circuit that amplifies a voltage difference between a first input voltage and a second input voltage and a latch circuit that compares magnitudes of the first input voltage and the second input voltage according to the amplified voltage difference and latch a comparison result. The preliminary amplification circuit converts the first input voltage and the second input voltage input with the falling edge timing of a clock signal into a first control signal and a second control signal, respectively that return from the reversal state at respective speeds corresponding to the first input voltage and the second input voltage. The latch circuit compares the first input voltage and the second input voltage according to the first control signal and the second control signal.

Aspects disclosed herein eliminate audible disturbances that may occur when an audio amplifier is activated and deactivated. A feedback circuit is used to maintain a closed loop when transistors of a power output stage are activate or deactivated, thereby enabling the charge to build or dissipate without causing an audible disturbance. Further, in certain implementations, the power output stage may remain in an enable state for a period of time after deactivation of the audio amplifier regardless of whether an audio input signal is received enabling dissipation of charge without causing an audible disturbance.

Systems and methods for suppressing transient outputs from an amplifier system are provided. An amplifier having a plurality of bias levels may be controlled to initiate a change in the level of a bias signal provided to the amplifier. The level of the bias signal is ramped from an initial bias level to a final bias level over numerous steps. The steps include at least one step in which the level of the bias signal is between the initial bias level and the final bias level. An amplifier system having multiple stages may be controlled to enable each stage and selectively couple each stage in a sequence that couples an output stage to an output terminal at the completion of the sequence.

The present disclosure discloses an amplifier circuit having reset mechanism. A pair of upper-half branches are electrically coupled between a first supply voltage and a pair of differential output terminals, are symmetrical and each includes at least one P-type transistor. A pair of lower-half branches are electrically coupled between the pair of differential output terminals and a second supply voltage, are symmetrical and each includes at least one N-type transistor. The P-type transistors and the N-type transistors are categorized into transistor groups that perform differential signal receiving process in turn in an interlaced manner under an interlaced input mode and perform reset signal receiving process to be turned on and be AC grounded when the differential signal receiving process is not performed such that the differential output terminals generate differential outputs.

A stacked amplifier circuit includes an input stage having first and second input ports respectively defined by inputs of first and second transistors. A transformer arrangement includes first and second primary windings and first and second secondary windings. The first secondary winding is connected to an output of the first input transistor and the second secondary winding is connected to an output of the second input transistor. Portions of the magnetic fields generated by the primary windings couple to their respective secondary windings. An output stage is AC coupled to the first and second secondary windings and has an output connected to the first and second primary windings. The input stage and the output stage are arranged in a stacked configuration such that a bias current of the output stage is reused as bias current for the input stage.

An operational amplifier includes a gain boost circuit. The gain boost circuit includes a first differential gm amplifier of a first stage, and a second differential gm amplifier of a post stage. Phase compensation capacitors are provided between inputs and outputs of a system of the second differential gm amplifier.

A method of operating an amplifier circuit having a transformer arranged so as to establish a magnetically coupled feedback loop between and output of an amplifier and an input of the amplifier. The method includes providing a DC bias current to the amplifier, and further includes increasing the DC bias current to improve a linearity of the amplifier circuit wherein a transfer gain of the amplifier circuit remains constant when the DC bias current is increased. A loop gain of the magnetically coupled feedback loop is set by selecting a coupling factor and turn-ratio of the transformer.

The transmission delay time of a receiver for receiving a differential signal is reduced. A first amplifier circuit is provided in an input stage of the receiver, and a second amplifier circuit is provided in an output stage of the receiver. The first amplifier circuit is a differential input, differential output amplifier circuit. The second amplifier circuit is a differential input, single-ended output amplifier circuit. A first power supply voltage and a second power supply voltage are input as a high-level power supply voltage and a low-level power supply voltage to the first amplifier circuit and the second amplifier circuit, respectively. The withstand voltage of transistors of a differential pair of the first amplifier circuit is higher than the withstand voltage of another transistor included in the first amplifier circuit and a transistor included in the second amplifier circuit.

An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.