A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing.

A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing.

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.

An apparatus includes a first common-source amplifier having a first PMOS (p-channel metal oxide semiconductor) transistor configured to receive a first voltage and output a first current; a second common-source amplifier having a first NMOS (n-channel metal oxide semiconductor) transistor configured to receive a second voltage and output a second current, wherein the first common-source amplifier and the second common-source amplifier share a common source node, and an AC (alternating current) component of the first voltage is an inversion of an AC component of the second voltage; a first common-gate amplifier having a second PMOS transistor configured to receive the first current and output a third current; a second common-gate amplifier having a second NMOS transistor configured to receive the second current and output a fourth current; and a load configured to terminate the third current and the fourth current.

A stacked amplifier circuit includes an input stage having first and second input ports respectively defined by inputs of first and second transistors. A transformer arrangement includes first and second primary windings and first and second secondary windings. The first secondary winding is connected to an output of the first input transistor and the second secondary winding is connected to an output of the second input transistor. Portions of the magnetic fields generated by the primary windings couple to their respective secondary windings. An output stage is AC coupled to the first and second secondary windings and has an output connected to the first and second primary windings. The input stage and the output stage are arranged in a stacked configuration such that a bias current of the output stage is reused as bias current for the input stage.

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.

A differential tuned inductor and a multilayer tunable transformer for an integrated circuit device for microwave and RF applications are disclosed. The tunable inductor can be used in differential artificial delay lines to achieve delay tuning while preserving impedance matching. The tunable transformer can also be used for mixer drives to achieve wider operational performance.

A method of operating an amplifier circuit having a transformer arranged so as to establish a magnetically coupled feedback loop between and output of an amplifier and an input of the amplifier. The method includes providing a DC bias current to the amplifier, and further includes increasing the DC bias current to improve a linearity of the amplifier circuit wherein a transfer gain of the amplifier circuit remains constant when the DC bias current is increased. A loop gain of the magnetically coupled feedback loop is set by selecting a coupling factor and turn-ratio of the transformer.

The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.

The present disclosure generally relates to semiconductor structures and, more particularly, to a fully depleted silicon on insulator power amplifier with unique biases and voltage standing wave ratio protection and methods of manufacture. The structure includes a pseudo-differential common source amplifier; first stage cascode devices connected to the pseudo-differential common source amplifier and protecting the pseudo-differential common source amplifier from an over stress; second stage cascode devices connected to the first stage cascode devices and providing differential outputs; and at least one loop receiving the differential outputs from the second stage cascode devices and feeding back the differential outputs to the second stage cascode devices.