Circuits for power-combined power amplifier array are provided, the circuits comprising: an input splitter coupled to an input that provides a plurality of outputs; a plurality of power amplifier unit cells, each power amplifier unit cell coupled to a corresponding output of the input splitter and each power amplifier unit cell providing an output signal at an output of the power amplifier unit cell; and a power combiner having an output, a plurality of inputs, each input coupled to the output of a corresponding power amplifier unit cell, and a plurality of C-L-C-section equivalents, each having an input connected to a corresponding one of the plurality of inputs of the power combiner and an output connected to the output of the power combiner.

A power amplifier that can support multiple communication networks while maintaining power efficiency across each of the supported communication networks is disclosed. In some implementations described herein, a power amplifier module includes a bypass circuit that enables different voltage supplies to be provided to the power amplifier. By regulating the voltage supply provided to the power amplifier, the power amplifier can support different communication networks while maintaining power efficiency across a dynamic frequency range. Moreover, embodiments herein may include a buck converter, or other form of DC-DC converter, that enables the power amplifier to operate with respect to multiple communication networks. Advantageously, in certain embodiments, because wireless devices that include multiple power amplifiers often require a DC-DC converter to support at least some of the communication networks, the inclusion of the buck converter in the embodiments described herein does not add additional cost or size to the wireless device.

A semiconductor device includes a differential amplification circuit that outputs differential output signals Vo1 and Vo2, external output terminals PD1 and PD2 to which one of the differential output signals Vo1 and Vo2 and single end signals Vo3 and Vo4 is selectively supplied, switch units SW1 and SW2 that control a conduction state between the external output terminal PD1 and the feedback line and a conduction state between the external output terminal PD2 and the feedback line, respectively, resistance elements R1 and R2 respectively provided in series with the switch units SW1 and SW2, a CMFB circuit that controls a common mode voltage of the differential amplification circuit according to a difference between an intermediate voltage Vcm of the external output terminals PD1 and PD2 in the feedback line and a reference voltage Vref, and a switch unit SW3 that controls to supply a clamp voltage to the feedback line.

A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.

A power amplifier that can support multiple communication networks while maintaining power efficiency across each of the supported communication networks is disclosed. In some implementations described herein, a power amplifier module includes a bypass circuit that enables different voltage supplies to be provided to the power amplifier. By regulating the voltage supply provided to the power amplifier, the power amplifier can support different communication networks while maintaining power efficiency across a dynamic frequency range. Moreover, embodiments herein may include a buck converter, or other form of DC-DC converter, that enables the power amplifier to operate with respect to multiple communication networks. Advantageously, in certain embodiments, because wireless devices that include multiple power amplifiers often require a DC-DC converter to support at least some of the communication networks, the inclusion of the buck converter in the embodiments described herein does not add additional cost or size to the wireless device.

A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.

To reduce signal output and wiring to a D/A converter (DAC). A DAP 1 comprises a DAC 7 that D/A-converts LR 2 channels digital audio data into LR 2 channels analog audio data, an amplification circuit 9 that amplifies the LR 2 channels analog audio data that the DAC 7 D/A-converts, a DAC 8 that D/A-converts the LR 2 channels digital audio data into the LR 2 channels analog audio data, and an amplification circuit 10 that amplifies inverted LR 2 channels analog audio data that the LR 2 channels analog audio data that the DAC 8 D/A-converts is inverted.

A power amplifier that can support multiple communication networks while maintaining power efficiency across each of the supported communication networks is disclosed. In some implementations described herein, a power amplifier module includes a bypass circuit that enables different voltage supplies to be provided to the power amplifier. By regulating the voltage supply provided to the power amplifier, the power amplifier can support different communication networks while maintaining power efficiency across a dynamic frequency range. Moreover, embodiments herein may include a buck converter, or other form of DC-DC converter, that enables the power amplifier to operate with respect to multiple communication networks. Advantageously, in certain embodiments, because wireless devices that include multiple power amplifiers often require a DC-DC converter to support at least some of the communication networks, the inclusion of the buck converter in the embodiments described herein does not add additional cost or size to the wireless device.

A bias circuit provides additional bias current for power amplifiers during data bursts to compensate for the gain droop caused by a rise in the power amplifier temperature during the data burst. A bias circuit includes a difference amplifier and switches coupled to the difference amplifier. The switches operate the bias circuit in a first mode when a transmit data burst is detected and operate the bias circuit in a second mode after the bias circuit has operated in the first mode for a predetermined period of time. In the first mode, the bias circuit charges a storage capacitor and sets an output current to zero. In the second mode, the bias circuit outputs the output current that increases above the initial value of zero as the PA warms up, where the excursion of this increase of current is determined by a register. The switches disable the bias circuit when the transmit data burst ends.

A power amplification device (1) according to an exemplary embodiment of the invention includes a Doherty amplifier (10) that is adjusted to operate at a set frequency, a frequency comparator (11) that compares a supplied frequency being a frequency of an input signal RF_IN to the Doherty amplifier (10) with the set frequency, and a protection circuit (12) that sets an operating state of the Doherty amplifier (10) to inactive when the supplied frequency and the set frequency are different. It is thereby possible to protect the Doherty amplifier (10) when the input signal RF_IN with a frequency different from the set frequency is supplied.