An active gain control circuit includes a voltage divider having a variable resistance configured to attenuate a rectified input line voltage to produce a reference signal, a filter circuit configured to extract a DC-level reference voltage from the reference signal, and an operational amplifier configured to receive the DC-level reference voltage and a comparison voltage, and to generate a gate control signal based on a difference between the comparison voltage and the DC-level reference voltage, wherein a resistance of the voltage divider is controlled by the gate control signal.

In accordance with embodiments of the present disclosure, a system may include a buffer and a switch coupled between the buffer and a voltage supply such that the switch controls a varying voltage at a varying voltage node coupled to the buffer.

The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.

In conventional optical receivers the dynamic range is obtained by using variable gain amplifiers (VGA) with a fixed trans-impedance amplifier (TIA) gain. To overcome the SNR problems inherent in conventional receivers an improved optical receiver comprises an automatic gain control loop for generating at least one gain control signal for controlling gain of both the VGA and the TIA. Ideally, both the resistance and the gain of the TIA are controlled by a gain control signal.

A circuit having a DC-to-DC converter and an input circuit connected on the line side of the DC-to-DC converter, having a first terminal and a second terminal for connection to a power supply and a third terminal and a fourth terminal for connection to the DC-to-DC converter. Between the first and third terminals, the input circle has a semiconductor element, wherein a first component terminal of the semiconductor element is connected via at least a first capacitor and a second capacitor to a second component terminal of the semiconductor element, wherein a resistance of the semiconductor element is controllable by a voltage between the first component terminal and the second component terminal.

A wideband variable gain amplifier (VGA) having a low phase change is disclosed. The first VGA amplifies an input signal by a current steering manner so that an amplification gain is variable. The larger a variable gain amount of the first output signal amplified by the first VGA is, the more a relative phase change amount gradually increases in either positive direction or negative direction. The second VGA further amplifies the first amplified output signal in the current steering manner so as to vary the amplification gain. As a variable gain amount of a second output signal amplified by the second VGA becomes larger, a relative phase change amount gradually increases in a direction opposite to the phase change direction of the first VGA. This opposing phase changes of the first and second VGAs are canceled against each other to provide a variable amplification gain over the wideband frequency range with a low phase change.

In conventional optical receivers the dynamic range is obtained by using variable gain amplifiers (VGA) with a fixed trans-impedance amplifier (TIA) gain. To overcome the SNR problems inherent in conventional receivers an improved optical receiver comprises an automatic gain control loop for generating at least one gain control signal for controlling gain of both the VGA and the TIA. Ideally, both the resistance and the gain of the TIA are controlled by a gain control signal.

The invention relates to a gain-control stage (100) for generating gain-control signals (V.sub.c+, V.sub.c) for controlling an external variable-gain amplifying unit (101). The gain-control stage comprises a first (102) and a second differential amplifier unit (112) that receive, at a respective input interface (104,114) a reference voltage signal (V.sub.Ref) and a variable gain-control voltage signal (V.sub.GC). The second differential amplifier unit is configured to provide, via a second output interface (120), a control voltage signal (V.sub.1) to a controllable first current source (106) of the first differential amplifier unit (102). The first differential amplifier unit (102) is configured to provide, via a first output interface (110), the first and the second gain-control signal (V.sub.C+, V.sub.C) in dependence on the variable gain-control voltage signal (V.sub.GC), the reference voltage signal (V.sub.Ref) and a first biasing current (I.sub.B1) that depends on the control voltage signal.

The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode Voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.

A number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.