Methods, systems, and devices for delay adjustment circuits are described. Amplifiers (e.g., differential amplifiers) may act like variable capacitors (e.g., due to the Miller-effect) to control delays of signals between buffer (e.g., re-driver) stages. The gains of the amplifiers may be adjusted by adjusting the currents through the amplifiers, which may change the apparent capacitances seen by the signal line (due to the Miller-effect). The capacitance of each amplifier may be the intrinsic capacitance of input transistors that make up the amplifier, or may be a discrete capacitor. In some examples, two differential stages may be inserted on a four-phase clocking system (e.g., one on 0 and 180 phases, the other on 90 and 270 phases), and may be controlled differentially to control phase-to-phase delay.

A system includes an instrumentation amplifier (INA) including a first transistor coupled to a first input node, and a second transistor coupled to a second input node. The INA also includes a resistor coupled between the first transistor and the second transistor. The INA includes a gain resistor network coupled to the resistor and to the first and second transistors, where the gain resistor network includes two or more gain resistors. The system also includes a voltage to current converter, where the voltage to current converter is coupled to the resistor and the gain resistor network.

A system includes an instrumentation amplifier (INA) including a first transistor coupled to a first input node, and a second transistor coupled to a second input node. The INA also includes a resistor coupled between the first transistor and the second transistor. The INA includes a gain resistor network coupled to the resistor and to the first and second transistors, where the gain resistor network includes two or more gain resistors. The system also includes a voltage to current converter, where the voltage to current converter is coupled to the resistor and the gain resistor network.

An example playback device includes a first interface for receiving a first audio signal from a first audio source; a second interface for receiving a second audio signal from a second audio source; and a processor configured to: cause the playback device to playback the second audio signal; determine that the first audio signal is present at the first interface; in response to determining that the first audio signal is present at the first interface, (i) cease playback of the second audio signal being played by the playback device and (ii) cause the playback device to playback the first audio signal; receive an instruction to stop the playback device from playing the first audio signal while the first audio signal is still present at the first interface; and arm the playback device such that a subsequent presence of the first audio signal at the first interface causes the playback device to play the first audio signal.

A system for controlling the gain of an input signal in an audio signal amplifier. The system includes a user-operable gain control, and analog and digital circuit elements that together are configured to modify the gain of the input signal in response to the user-operable gain control.

An automatic gain control system for a receiver, including: an automatic gain control loop (40) adapted to be coupled to both a first transimpedance amplifier (12) coupled to a first analog-to-digital converter (14) forming a first tributary and a second transimpedance amplifier (12) coupled to a second analog-to-digital converter (14) forming a second tributary; and an offset gain control voltage to gain balance a transimpedance amplifier gain of the first tributary and a transimpedance amplifier gain of the second tributary. The automatic gain control loop can be analog. Also, the automatic gain control loop can be implemented in hardware or firmware.

A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.

A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.

Disclosed embodiments provide flexible performance, high dynamic range, microelectromechanical (MEMS) multipath digital microphones, which allow seamless, low latency transitions between audio signal paths without audible artifacts over interruptions in the audio output signal. Disclosed embodiments facilitate performance and power saving mode transitions maintaining high dynamic range capability.

A communication system includes a transmitter configured to transmit a modulated signal, a transmission line configured to carry the modulated signal, and a receiver coupled to the transmitter by the transmission line, and configured to receive the modulated signal. The transmitter includes a modulator configured to generate the modulated signal responsive to a data signal and a carrier signal. The receiver includes a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit configured to adjust a gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.