H03H3/08

STRUCTURE AND MANUFACTURING METHOD OF SURFACE ACOUSTIC WAVE FILTER WITH BACK ELECTRODE OF PIEZOELECTRIC LAYER
20230008078 · 2023-01-12 ·

A fabrication method of a surface acoustic wave (SAW) filter, includes: obtaining a piezoelectric substrate; forming a back electrode on a first portion of the piezoelectric substrate; forming a sacrificial layer on the first portion of the piezoelectric substrate, covering the back electrode; forming a first dielectric layer on the first portion of the piezoelectric substrate, covering the sacrificial layer; bonding a bottom substrate to the first dielectric layer; removing a second portion of the piezoelectric substrate to expose the first portion of the piezoelectric substrate, the first portion of the piezoelectric substrate constituting a piezoelectric layer; forming one or more release holes through the piezoelectric layer; forming an interdigital transducer (IDT) on the piezoelectric layer; and etching and releasing the sacrificial layer via the one or more release holes to form a lower cavity exposing the back electrode.

STRUCTURE AND MANUFACTURING METHOD OF SURFACE ACOUSTIC WAVE FILTER WITH BACK ELECTRODE OF PIEZOELECTRIC LAYER
20230008078 · 2023-01-12 ·

A fabrication method of a surface acoustic wave (SAW) filter, includes: obtaining a piezoelectric substrate; forming a back electrode on a first portion of the piezoelectric substrate; forming a sacrificial layer on the first portion of the piezoelectric substrate, covering the back electrode; forming a first dielectric layer on the first portion of the piezoelectric substrate, covering the sacrificial layer; bonding a bottom substrate to the first dielectric layer; removing a second portion of the piezoelectric substrate to expose the first portion of the piezoelectric substrate, the first portion of the piezoelectric substrate constituting a piezoelectric layer; forming one or more release holes through the piezoelectric layer; forming an interdigital transducer (IDT) on the piezoelectric layer; and etching and releasing the sacrificial layer via the one or more release holes to form a lower cavity exposing the back electrode.

Structure for radio-frequency applications

A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.

Structure for radio-frequency applications

A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.

METHOD FOR MANUFACTURING COMPOSITE SUBSTRATE PROVIDED WITH PIEZOELECTRIC SINGLE CRYSTAL FILM
20230216463 · 2023-07-06 ·

Provided is a method of manufacturing a composite substrate equipped with a piezoelectric single-crystal film having good film-thickness uniformity and not causing deterioration in properties even if ion implantation is performed. The method of manufacturing a composite substrate 10 equipped with a piezoelectric single-crystal film 11 according to the present invention includes the steps of: (a) subjecting a piezoelectric single-crystal substrate 1 made of lithium tantalate or lithium niobate to ion implantation treatment to form an ion implantation layer 11, (c) bonding the surface of the piezoelectric single-crystal substrate 1 having the ion implantation layer 11 thereon to a temporary bonding substrate 2, (d) separating the piezoelectric single-crystal substrate 1 into the ion implantation layer 11 and the remaining portion of the substrate to form a piezoelectric single-crystal film 11 on the temporary bonding substrate 2, (f) bonding a supporting substrate 3 to the surface of the piezoelectric single-crystal film 11 opposite to a bonded surface of the temporary bonding substrate, and (g) separating the temporary bonding substrate from the piezoelectric single-crystal film 11.

METHODS OF MANUFACTURING MULTI-BAND SURFACE ACOUSTIC WAVE FILTERS

A method of manufacturing a packaged surface acoustic wave filter chip is disclosed. The method can include providing a structure having first interdigital transducer electrodes formed with a first piezoelectric layer, second interdigital transducer electrodes formed with a second piezoelectric layer, and a substrate between the first and second piezoelectric layers. The method can include forming a plurality of through electrodes extending at least partially through a thickness of the structure such that a first set of through electrodes of the plurality of through electrodes are electrically connected to the first interdigital transducer electrodes and a second set of through electrodes of the plurality of through electrodes are electrically isolated from the first interdigital transducer electrodes.

Acoustic wave device, front-end circuit, and communication apparatus

An acoustic wave device includes an element substrate having piezoelectricity, a functional electrode on a first main surface of the element substrate, an extended wiring line electrically connected to the functional electrode and extending from the first main surface to a side surface of the element substrate, an external terminal electrically connected to the extended wiring line and on a second main surface of the element substrate, a first resin portion to seal the acoustic wave device, and a second resin portion at least between the extended wiring line on the side surface and the first resin portion. The second resin portion has a lower Young's modulus than the first resin portion.

Acoustic wave device, front-end circuit, and communication apparatus

An acoustic wave device includes an element substrate having piezoelectricity, a functional electrode on a first main surface of the element substrate, an extended wiring line electrically connected to the functional electrode and extending from the first main surface to a side surface of the element substrate, an external terminal electrically connected to the extended wiring line and on a second main surface of the element substrate, a first resin portion to seal the acoustic wave device, and a second resin portion at least between the extended wiring line on the side surface and the first resin portion. The second resin portion has a lower Young's modulus than the first resin portion.

Air gap type semiconductor device package structure and fabrication method thereof

The present disclosure provides a package structure of an air gap type semiconductor device and its fabrication method. The fabrication method includes forming a bonding layer having a first opening on a carrier; disposing a semiconductor chip on the bonding layer, thereby forming a first cavity at the first opening, where the first cavity is at least aligned with a portion of an active region of the semiconductor chip; performing an encapsulation process to encapsulate the semiconductor chip on the carrier; lastly, forming through holes passing through the carrier where each through hole is aligned with a corresponding input/output electrode region of the semiconductor chip, and forming interconnection structures on a side of the carrier different from a side with the bonding layer, where each interconnection structure passes through a corresponding through hole and is electrically connected to an corresponding input/output electrode.

Air gap type semiconductor device package structure and fabrication method thereof

The present disclosure provides a package structure of an air gap type semiconductor device and its fabrication method. The fabrication method includes forming a bonding layer having a first opening on a carrier; disposing a semiconductor chip on the bonding layer, thereby forming a first cavity at the first opening, where the first cavity is at least aligned with a portion of an active region of the semiconductor chip; performing an encapsulation process to encapsulate the semiconductor chip on the carrier; lastly, forming through holes passing through the carrier where each through hole is aligned with a corresponding input/output electrode region of the semiconductor chip, and forming interconnection structures on a side of the carrier different from a side with the bonding layer, where each interconnection structure passes through a corresponding through hole and is electrically connected to an corresponding input/output electrode.