According to one embodiment, a matching network circuit includes a first capacitor coupled, in parallel, to an input port of the matching network circuit; a broadband on-chip transformer coupled, in parallel, to the first capacitor, where the broadband on-chip transformer includes a primary winding and a secondary winding, where the secondary winding is a partial winding. The matching network circuit includes a second capacitor coupled, in series, in between the broadband on-chip transformer and an output port of the matching network circuit.

Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor, and whether a shunt reactance is coupled to the RF source or RF load. Once the capacitance and inductance values for a match solution are determined they are contemporaneously selected without any iterative searching necessary for the match solution.

A transceiver circuit that includes a receiver and transmitter circuits may send and receive data signals using an antenna. The transceiver circuit may be coupled to the antenna and other circuits using multiple impedance matching networks configured to match input and output impedance values of the receiver and transmitter circuits to the antenna and other circuits. The impedance matching networks may selectively couple and decouple different ports of the receiver and transmitter circuits to other circuit nodes based on whether the transceiver is operating in transmit or receive mode.

A radio-frequency module includes a multilayer substrate, an input switch, an output switch, and filters. A switch IC is disposed on a main surface of the multilayer substrate. The input switch is disposed in the switch IC and includes a first input terminal and first output terminals. The output switch is disposed in the switch IC and includes second input terminals and a second output terminal. The filters are disposed outside the switch IC and are connected to the first output terminals and the second input terminals. In a plan view of the multilayer substrate, the first input terminal and the first output terminals are disposed close to a first side of an exterior of the switch IC, and the second input terminals and the second output terminal are disposed close to a second side different from the first side of the exterior of the switch IC.

Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor, and whether a shunt reactance is coupled to the RF source or RF load. Once the capacitance and inductance values for a match solution are determined they are contemporaneously selected without any iterative searching necessary for the match solution.

The invention relates to a circuit (100) able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a power supply signal comprising at least two distinct frequencies.

The invention relates to a universal semiconductor automatic high-speed serial signal testing method, comprising: a chip to be tested sending, to an impedance matching unit, a high-speed serial signal; then by means of a phase shift unit, sequentially transforming, according to a set fixed resolution, the phase of the high-speed serial signal, the magnitude of each offset phase being determined by a phase shift control signal outputted by a control unit and the resolution of the phase shift unit; after passing through the phase shift unit, the high-speed serial signal keeps channel impedance matching by means of the impedance matching unit; the signal entering an acquisition unit, and being acquired under the action of an acquisition control signal sent by the control unit; the control unit performing signal exchange with semiconductor automatic testing equipment (ATE); and the acquisition unit transmitting the acquired signal back to the universal semiconductor ATE for algorithm operation, and then the actual high-speed serial data stream is obtained. The present invention enables direct testing of high-speed serial interface signals by means of the universal ATE during mass production, greatly improving testing convenience and efficiency.

An antenna impedance tuner can include first and second nodes, a bypass path, first and second series capacitance paths, and an inductance path, with each path being implemented between the first and second nodes and including a switch configured to allow the path to couple or uncouple the first and second nodes. The tuner can further include first and second shunt paths, with each shunt path being implemented between the second node and ground and including a switch configured to allow the shunt path to couple or uncouple the second node and the ground. The tuner can further include a switchable grounding path implemented along the inductance path and configured to allow the inductance path to function as a series inductance path between the first and second nodes, or as a shunt inductance path between the ground and a node along the inductance path.

According to one embodiment, an IC chip includes a plurality of fuse elements including a plurality of fuse portions each of which is to be cut off by a stress, and a plurality of actuator portions provided for the plurality of fuse portions, respectively, and each of which applies a stress to corresponding one of fuse portions, and a control circuit supplying a control signal for cutting off desired one of the fuse portions to corresponding one of the actuator portions.

An antenna terminal is connected to a first filter and second filter, which are branched from each other when viewed from the antenna terminal, and are different in passing bands from each other. An individual inductor is connected in series to a branch point from which the first filter is branched to be independent from other filters when viewed from the antenna terminal. And a common inductor is located between a position between the antenna terminal and the branch point and a reference potential and is commonly connected in parallel with respect to the filters. The first filter is higher in frequency of passing band compared with the other filters. A susceptance when viewing the second filter side from the antenna terminal is larger than a susceptance when viewing the first filter side from the antenna terminal at frequencies of passing bands of them.