A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.

Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.

Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.

Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.

Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.

An active matching network for impedance matching to a miniature antenna, comprising a cross-coupled transistor pair, where each transistor has an emitter, base and collector, the emitter of a first transistor forms an input terminal, the emitter of a second transistor forms on output terminal, the collector of the first transistor coupled to the base of the second transistor, the collector of the second transistor coupled to the base of the first transistor, and a matching circuit coupled between the collectors of the first and second transistors. The matching network is configured to match an impendence near resonance of the high Q miniature antenna to an input impedance using a complex negative impedance comprising resistance, inductance and capacitance.

An active matching network for impedance matching to a miniature antenna, comprising a cross-coupled transistor pair, where each transistor has an emitter, base and collector, the emitter of a first transistor forms an input terminal, the emitter of a second transistor forms on output terminal, the collector of the first transistor coupled to the base of the second transistor, the collector of the second transistor coupled to the base of the first transistor, and a matching circuit coupled between the collectors of the first and second transistors. The matching network is configured to match an impendence near resonance of the high Q miniature antenna to an input impedance using a complex negative impedance comprising resistance, inductance and capacitance.

A four-terminal-pair AC quantum resistance dissemination bridge and related methods are provided. The bridge includes: a supply transformer IVD1, a Kelvin branch A1, a Wagner branch A0, the first and second current sources A2, A3, an injection inductive voltage divider A4, a ratio transformer IVD2, the first and second four-terminal AC resistor connection points Z1, Z2, chokes H, and null indicators D. An isolated inductive winding LO is wound along the ratio transformer IVD2 and supplies excitation current to primary winding of injection inductive voltage divider A4 to avoid the mutual influence among various balance networks and rapid balance of the bridge can be realized. By changing turn ratio of primary winding L3 and secondary winding L4 of the second inductive voltage divider T2, the phase shift can be realized through only one set of capacitors for imaginary part error compensation, the bridge with multiple frequency points can be obtained.

A four-terminal-pair AC quantum resistance dissemination bridge and related methods are provided. The bridge includes: a supply transformer IVD1, a Kelvin branch A1, a Wagner branch A0, the first and second current sources A2, A3, an injection inductive voltage divider A4, a ratio transformer IVD2, the first and second four-terminal AC resistor connection points Z1, Z2, chokes H, and null indicators D. An isolated inductive winding LO is wound along the ratio transformer IVD2 and supplies excitation current to primary winding of injection inductive voltage divider A4 to avoid the mutual influence among various balance networks and rapid balance of the bridge can be realized. By changing turn ratio of primary winding L3 and secondary winding L4 of the second inductive voltage divider T2, the phase shift can be realized through only one set of capacitors for imaginary part error compensation, the bridge with multiple frequency points can be obtained.

An impedance control circuit includes a configuration channel interface, three resistors and two transistors. The configuration channel interface is coupled to a universal serial bus device. The first resistor has a first terminal coupled to the configuration channel interface. The first transistor has a first terminal coupled to a second terminal of the first resistor, and a second terminal coupled to a system voltage terminal. The second transistor has a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to the system voltage terminal. The second resistor has a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to a control terminal of the second transistor. The third resistor has a first terminal coupled to the second terminal of the second resistor, and a second terminal coupled to the system voltage terminal.