Embodiments disclosed herein include a processing tool. In an embodiment the processing tool comprises a transmission line sensor, and an analog to digital (A/D) converter. In an embodiment, the processing tool may further comprise a digital down converter (DDC), and a frequency digital phase lock loop (dPLL). In an embodiment, the processing tool may further comprise a transmission line scaling module.

A method for controlling an FIR filter includes generating, based on operation information, a first and second control data, generating a second amplitude characteristic, and setting filter coefficients of the FIR filter based on the second amplitude characteristic. The first control data indicates an amount of expansion/compression in a frequency axis direction of a first amplitude characteristic that corresponds to a predetermined transfer function that is expressed as a function of an angular frequency, and the amount of expansion/compression is an integer value or a non-integer value. The second control data indicates an amount of shift in the frequency axis direction of the first amplitude characteristic. The second amplitude characteristic is generated by expanding/compressing the first amplitude characteristic in the frequency axis direction in accordance with the first control data and shifting the first amplitude characteristic in the frequency axis direction in accordance with the second control data.

A method for controlling an FIR filter includes generating, based on operation information, a first and second control data, generating a second amplitude characteristic, and setting filter coefficients of the FIR filter based on the second amplitude characteristic. The first control data indicates an amount of expansion/compression in a frequency axis direction of a first amplitude characteristic that corresponds to a predetermined transfer function that is expressed as a function of an angular frequency, and the amount of expansion/compression is an integer value or a non-integer value. The second control data indicates an amount of shift in the frequency axis direction of the first amplitude characteristic. The second amplitude characteristic is generated by expanding/compressing the first amplitude characteristic in the frequency axis direction in accordance with the first control data and shifting the first amplitude characteristic in the frequency axis direction in accordance with the second control data.

Prism signal processing is a new FIR filtering technique that can offer a fully recursive calculation and elegant filter design. Its low design and computational cost may be particularly suited to the autonomous signal processing requirements for the Internet of Things. Arbitrarily narrow band-pass filters may be designed and implemented using a chain of Prisms and a simple yet powerful procedure. Using the described method and system, an ultra-narrowband filter can be evaluated in fractions of a microsecond per sample on a desktop computer. To achieve this update rate using a conventional non-recursive FIR calculation would require supercomputer resources. FPGA embodiments of the system demonstrate computation efficiency and broad applications of the technique.

A system comprises a generator control unit (GCU) configured to control a generator. The system includes a first sensor connected to provide feedback to the GCU for generator control. The first sensor is configured to connect to sense at least one of voltage and/or current in a feeder connecting between the generator and a load. The system also includes a second sensor connected to provide feedback to the GCU for generator control. The second sensor is configured to sense at least one of voltage and/or current in a feeder connecting between the generator and the load. The first and second sensors are configured to connect to the feeder apart from one another with feeder impedance therebetween.

A method and an apparatus for signal processing: implementing step-by-step orthogonal decomposition of an original signal to be inputted; on the basis of the number of layers of orthogonal decomposition and the edge high frequency bandwidth of the original signal after orthogonal decomposition, generating a finite-length unit impulse response FIR filter; using the FIR filter to filter the edge high-frequency signal of the original signal; and, after passing the signal obtained after filtering and the low frequency signal obtained at each stage of orthogonal decomposition through an orthogonal filter bank, implementing signal synthesis processing.

Methods, systems, and devices for wireless communications are described that provide a repeater for beamforming a received signal at a millimeter wave (mmW) radio frequency via one or more scan angles or beamforming directions and then retransmitting and beamforming the signal at the mmW radio frequency. Repeaters may include analog and digital components for downconverting on the received signal to reduce a frequency of the signal from the mmW frequency to an intermediate frequency (IF) or baseband frequency, and then filtering the downconverted signal to reduce interference. The filtering may include digital filtering or a combination of analog and digital filtering, in which a set of filter coefficients for the digital filtering is selected based on beamforming parameters used to receive the signal, retransmit the signal, or both. The repeater may then upconvert the filtered signal back to the mmW frequency for the retransmission of the signal.

An arithmetic processing apparatus according to the present disclosure includes a digital filter. The arithmetic processing apparatus further includes a dummy data input unit configured to input dummy data to the digital filter when there is no input data input to the digital filter. The arithmetic processing apparatus further includes a cancellation processing unit configured to perform, on output data output from the digital filter, arithmetic processing for canceling an output component caused by the dummy data.

A hardware downscaler and an architecture for implementing a FIR filter in which the downscaler can be arranged for downscaling by a half in one dimension. The downscaler can comprise: hardware logic implementing a first three-tap FIR filter; and hardware logic implementing a second three-tap FIR filter; wherein the output from the hardware logic implementing the first three-tap filter is provided as an input to the hardware logic implementing the second three-tap filter.

A signal density modulation (SDM) encoder includes a first subtractor, a sigma circuit and a multi-bit quantizer. The first subtractor is used for receiving an input signal. The sigma circuit is coupled to the first subtractor. The multi-bit quantizer, coupled to the first subtractor and the sigma circuit, is configured to generate an output signal. The sigma circuit or the multi-bit quantizer produces a first feedback signal to the first subtractor. The first subtractor performs a subtraction operation according to the first feedback signal and the input signal, and generates a delta signal. The sigma circuit performs an operation on the delta signal, such that the SDM encoder has a noise transfer function having a high pass filtering effect. The noise transfer function is a ratio of a quantization error brought by the multi-bit quantizer with respect to the input signal. The output signal has more than two levels.