Patent classifications
H03H2017/0081
FAST PREDICTION PROCESSOR
Hybrid analog-digital processing systems are described. An example of a hybrid analog-digital processing system includes photonic accelerator configured to perform matrix-vector multiplication using light. The photonic accelerator exhibits a frequency response having a first bandwidth (e.g., less than 3 GHz). The hybrid analog-digital processing system further includes a plurality of analog-to-digital converters (ADCs) coupled to the photonic accelerator, and a plurality of digital equalizers coupled to the plurality of ADCs, wherein the digital equalizers are configured to set a frequency response of the hybrid analog-digital processing system to a second bandwidth greater than the first bandwidth.
Adaptive Preset-Based Feed-Forward Equalization
This application discloses adaptively setting feed-forward equalization (FFE) for a data communication channel. An equalization signal is generated using a finite impulse response (FIR) filter that has a plurality of FIR coefficients configured to be defined by one of a plurality of preset configurations. A lookup table has a plurality of rows, and each row is associated with a different preset configuration of the FIR coefficients and identifies a subset of respective preset configurations corresponding to a subset of FIR coefficients. In some implementations, a temporal sequence of preset configurations of the FIR coefficients is selected from the lookup table, until a predefined equalization criterion is satisfied. In some implementations, residual errors are determined and correspond to signal samples of the equalization signal, and a sequence of preset configurations of the FIR coefficients is selected from the lookup table based on the residual errors.
FIR FILTER CIRCUIT DESIGN METHOD USING APPROXIMATE COMPUTING
A finite impulse response (FIR) filter circuit design method using approximate computing, the FIR filter circuit design method including: replacing adders of the FIR filter with approximate adders; and performing a synthesis work according to a set approximate synthesis flow when the replacing of the adders of the FIR filter are replaced with the approximate adders is performed, wherein, in the approximate synthesis flow, a numeric column of each of the approximate adders is divided into an accurate part and an inaccurate part, and a numeric column of the inaccurate part is approximated. In the FIR filter, conventional adders/subtractors are replaced with addition/subtraction having an automated synthesis flow so that energy consumption can be reduced.
NOISE GENERATOR
A noise generator for generating a noise signal over a frequency spectrum has a first noise source and a first digital filter for a first frequency band, a second noise source and a second digital filter for a second frequency band, and an interpolator and a combiner. The first digital filter has a first sample rate and the second digital filter has a second sample rate, wherein the ratio between the second sample rate and the first sample rate, with regard to a sign, corresponds to a ratio between center frequencies of the second frequency band and the first frequency band, wherein an edge of the second digital filters which determines a lower frequency band limit is steeper than an edge of the first digital filter which determines an upper frequency band limit. The interpolator is configured to adjust an output signal of the first digital filter, with regard to its sample rate, to a sample rate of the second digital filter, wherein the combiner is configured to combine the adjusted output signal from the interpolator and the output signal of the second digital filter.
WIRELESS REPEATER WITH FIR BASED CHANNEL EQUALIZER
This invention presents a repeater enhanced MU-MIMO wireless communication system com-prising a BS, a plural of repeaters, and a plural of UEs, where a repeater estimates the channel between itself and its upper communication node in the system, a repeater computes equalization coefficients based on the estimation of the channel coefficients, and a repeater applies the equalization coefficients to reduce the channel delay spread or increase the coherence bandwidth of the channel between communication nodes containing the BS, the UEs, or the repeaters.
SYSTEM FOR AND METHOD OF DIGITAL TO ANALOG CONVERSION FREQUENCY DISTORTION COMPENSATION
The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion a compensation circuit and a digital to analog conversion circuit. The compensation circuit includes a filter configured to provide roll off compensation in a baseband frequency using first coefficients. The compensation circuit is configured to convert the first digital signal to a second digital signal so that the second digital signal can be filtered by the filter using the first coefficients.
Analog FIR filter
A FIR filter (15), comprising an input terminal for receiving an input signal, a first filtering circuit comprising: a first transconductance device (30a) configured to generate a first current signal (i1) proportional to the input signal; a first analog switch (41a) commuted in n by a first digital gate signal (1) and configured to block the current signal when the first digital gate signal has a first value and to transmit the current signal to a first integrating capacitor (45a) when the first digital gate signal has a second value; characterized in that the first digital gate signal (1) comprises a periodic series of pulses, wherein the pulses have widths proportional to the filter coefficients.
SIGNAL REMOVAL TO EXAMINE A SPECTRUM OF ANOTHER SIGNAL
A method for removing an extracted RF signal to examine a spectrum of at least one other RF signal includes receiving a mixture signal by an ADC. The mixture signal includes a plurality of separate signals from different signal sources. The mixture signal is digitized by the ADC. A first digitized signal and a second digitized signal are generated that are the same. The first digitized signal is delayed a predetermined time delay and the second digitized signal is processed in a neuromorphic signal processor to extract an extracted signal. The predetermined time delay corresponds to a delay embedding in the neuromorphic signal processor. A phase delay and amplitude of the extracted signal is adjusted based on a phase delay and amplitude of the first digitized signal. An adjusted extracted signal is cancelled from the first digitized signal to provide an input examination signal for examination.
DEVICE AND METHOD FOR CONTINUOUS-TIME ENERGY CALCULATION OF AN ANALOG SIGNAL
Device (1), for continuous-time energy calculation of an analog signal, comprising: a continuous-time analog-to-digital converter which is configured to convert the analog signal into a request signal (REQ), and a direction signal (DIR); at least one filtering unit (11), configured to output a filtered output signal (F.sub.out), and comprising a delaying module (12) and a calculating module (15), connected to the delaying module (12) and configured calculate the filtered output signal (F.sub.out).
According to the invention, the device (1) further comprises: at least one pulse combiner (16), connected to the delaying module (12) and configured to output a combined request signal (CREQ); and at least one energy estimator (17), connected to the filtering unit (11) and to the pulse combiner (16), configured to compute a stored energy value (A.sub.out) associated with each pulse of the combined request signal (CREQ).
Digital filter circuit, measurement instrument, and signal processing
A digital filter circuit for filtering at least two input signals having different signal data rates is described. The digital filter circuit includes an input multiplexer sub-circuit, a digital filter, and an output multiplexer sub-circuit. The digital filter is connected to the input multiplexer sub-circuit downstream of the input multiplexer sub-circuit. The digital filter is connected to the output multiplexer sub-circuit upstream of the output multiplexer sub-circuit. The input multiplexer sub-circuit is configured to receive the at least two input signals having different signal data rates. The input multiplexer sub-circuit is configured to selectively forward the at least two input signals to the digital filter. The digital filter is configured to filter the at least two input signals, thereby obtaining at least two filtered input signals. The output multiplexer sub-circuit is configured to selectively output the at least two filtered input signals. Further, a measurement instrument and a signal processing method are described.