An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

An apparatus for processing an audio signal includes a configurable first audio signal processor for processing the audio signal in accordance with different configuration settings to obtain a processed audio signal, wherein the apparatus is adapted so that different configuration settings result in different sampling rates of the processed audio signal. The apparatus furthermore includes n analysis filter bank having a first number of analysis filter bank channels, a synthesis filter bank having a second number of synthesis filter bank channels, a second audio processor being adapted to receive and process an audio signal having a predetermined sampling rate, and a controller for controlling the first number of analysis filter bank channels or the second number of synthesis filter bank channels in accordance with a configuration setting.

A Scalable Finite Impulse Response (SFIR) filter includes a pre-processing section, a post-processing section, and a finite impulse response (FIR) Matrix. The FIR Matrix is coupled to the pre-processing section and the post-processing section. The FIR Matrix includes a plurality of filter taps and a plurality of signal paths. Each filter tap of the plurality of filter taps has at least a first input, a second input, a multiplexer coupled to the first input and the second input, and a first flip-flop coupled to an output of the multiplexer. The plurality of signal paths are arranged to allow re-configurable data throughput between the each filter tap of the plurality of filter taps.

The invention relates to a method (100) for switching between desired value filters (26, 28) of a drive means (52) for a machine axis (10, 12) during operation. An input signal (20) is applied to the first and to the second desired value filter (26, 28) for producing a first and a second output signal (23, 33). Then any deviation between the first and the second output signal (23, 33) is determined. If the deviation falls below a threshold value, the first desired value filter (26) is separated from the drive means (52) and substantially simultaneously the second desired value filter (28) is connected to the drive means (52). The desired value filters (26, 28) have different running times (19).

Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta-signal loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.

A Scalable Finite Impulse Response (SFIR) filter is disclosed. The SFIR filter includes a pre-processing section, a post-processing section, and a finite impulse response (FIR) Matrix. The FIR Matrix includes a plurality of filter taps and a plurality of signal paths in signal communication with each filter tap. The plurality of signal paths are arranged to allow re-configurable data throughput between the each filter tap and the pre-processing section and post-processing section are in signal communication with the FIR Matrix.

An apparatus for processing an audio signal includes a configurable first audio signal processor for processing the audio signal in accordance with different configuration settings to obtain a processed audio signal, wherein the apparatus is adapted so that different configuration settings result in different sampling rates of the processed audio signal. The apparatus furthermore includes n analysis filter bank having a first number of analysis filter bank channels, a synthesis filter bank having a second number of synthesis filter bank channels, a second audio processor being adapted to receive and process an audio signal having a predetermined sampling rate, and a controller for controlling the first number of analysis filter bank channels or the second number of synthesis filter bank channels in accordance with a configuration setting.

Example embodiments disclosed herein relate to filter coefficient updating in time domain filtering. A method of processing an audio signal is disclosed. The method includes obtaining a predetermined number of target gains for a first portion of the audio signal by analyzing the first portion of the audio signal. Each of the target gains is corresponding to a subband of the audio signal. The method also includes determining filter coefficients for time domain filtering the first portion of the audio signal so as to approximate a frequency response given by the target gains. The filter coefficients are determined by iteratively selecting at least one target gain from the target gains and updating the filter coefficient based on the selected at least one target gain. Corresponding system and computer program product for processing an audio signal are also disclosed.

This disclosure provides systems, methods, and apparatus, including computer programs encoded on computer-readable media, for configuring components of transmission circuitry. In one aspect, a first set of linear kernels and a first set of nonlinear kernels associated with a composite digital pre-distortion (DPD) kernel design is determined based on a first iteration of a DPD kernel analysis process. The first set of linear kernels is separated from the first set of nonlinear kernels according to a first iteration of a linear filter separation process. A final set of linear kernels and a final set of nonlinear kernels are determined based on one or more additional iterations of the DPD kernel analysis process and the linear filter separation process. A pre-DPD filter for the transmission circuitry is configured using a final set of filter coefficients derived based on the final set of linear kernels.