Techniques and mechanisms for determining calibration information based on tuning of a ring oscillator circuit formed with two integrated circuit (IC) dies. In an embodiment, an oscillator circuit comprises an in-series arrangement of delay circuits including a first one or more delay circuits of a first die, and a second one or more delay circuits of a second die. Respective circuitry of the first die and the second die performs tuning to match an oscillation frequency of the oscillator circuit with a reference frequency. An operational setting of the tuned oscillator circuit is provided to calibrate transmitter circuitry of the first die and the second die. In another embodiment, tuning of the oscillator circuit is further based on tuning of a local oscillator circuit of one of the first die or the second die.

Various implementations described herein refer to a device having an integrated circuit with multiple tiers including a first tier and a second tier that are arranged vertically in a stacked configuration. The first tier may have first functional components, and the second tier may have second functional components. The device may have a three-dimensional (3D) connection within the first tier that allows for synchronous signaling between the first functional components and the second functional components for reducing latency between the multiple tiers including the first tier and the second tier.

Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, first input is connected to the comparator output, the second inputs is connected to the second amplifier output; a sampling capacitor connected between the second input of the first amplifier and a ground; and an integration capacitor connected between the comparator output and the ground.

Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, first input is connected to the comparator output, the second inputs is connected to the second amplifier output; a sampling capacitor connected between the second input of the first amplifier and a ground; and an integration capacitor connected between the comparator output and the ground.

A duty timing detector includes: a control logic, the control logic being configured to: receive an input toggle signal and an output toggle signal that corresponds to the input toggle signal, and generate a difference signal using a difference between a duty of the input toggle signal and a duty of the output toggle signal; a first low-pass filter configured to output a DC input voltage based on a pulse width of the input toggle signal; a second low-pass filter configured to output a DC difference voltage based on a pulse width of the difference signal; a compensation circuit configured to compensate the duty of the output toggle signal using the DC input voltage and the DC difference voltage; and an oscillator configured to generate a duty-compensated output toggle signal, and to provide the duty-compensated output toggle signal to the control logic.

A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.

A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.

Analog calibration (ACAL) circuits supporting iterative measurement of an input signal from a measured circuit, and related methods are disclosed. The ACAL circuit includes a voltage reference generation circuit and a comparator circuit. The voltage reference generation circuit is configured to provide an input reference voltage. The comparator circuit is configured to compare the input reference voltage to an input circuit voltage of a measured circuit and generate a digital measurement signal based on the comparison. To provide for the ACAL circuit to more precisely measure the input circuit voltage, the voltage reference generation circuit is programmable and is configured to a generate the input reference voltage based on a programmed reference voltage selection. In this manner, the ACAL circuit can be used to measure the input circuit voltage in an iterative manner based on different programmed input reference voltages for a more precise measurement of the input circuit voltage.

Analog calibration (ACAL) circuits supporting iterative measurement of an input signal from a measured circuit, and related methods are disclosed. The ACAL circuit includes a voltage reference generation circuit and a comparator circuit. The voltage reference generation circuit is configured to provide an input reference voltage. The comparator circuit is configured to compare the input reference voltage to an input circuit voltage of a measured circuit and generate a digital measurement signal based on the comparison. To provide for the ACAL circuit to more precisely measure the input circuit voltage, the voltage reference generation circuit is programmable and is configured to a generate the input reference voltage based on a programmed reference voltage selection. In this manner, the ACAL circuit can be used to measure the input circuit voltage in an iterative manner based on different programmed input reference voltages for a more precise measurement of the input circuit voltage.

The present embodiment relates to an oscillator circuit, a semiconductor integrated circuit device and a method for frequency correction of an oscillator circuit, and more particularly, to an oscillator circuit, a semiconductor integrated circuit device and a method for frequency correction of an oscillator circuit capable of stably maintaining an output frequency of a clock signal even when a temperature of the semiconductor integrated circuit device changes.