An electronic circuit for uniform distribution of a current includes: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET. The first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET.

An electronic circuit for uniform distribution of a current includes: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET. The first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET.

Relaxation oscillator and method for providing an output frequency. For example, the relaxation oscillator includes a reference generator, a capacitor, a first comparator, a second comparator, a latch, and a temperature compensation circuit. The reference generator is configured to generate a first bias current, a first bias voltage and a second bias voltage. The capacitor is configured to be charged by a charging current to generate a charged voltage, and the charging current is generated based on at least the first bias current. The first comparator is configured to compare the charged voltage and the first bias voltage to generate a first comparison result, and the second comparator is configured to compare the charged voltage and the second bias voltage to generate a second comparison result. The latch is configured to generate a clock signal based on at least the first comparison result and the second comparison result.

An impedance calibration device for a semiconductor device includes a process sensor that detects a process condition for the semiconductor device and outputs a process signal, a temperature monitoring sensor that detects a temperature of the semiconductor device and outputs a temperature signal, a converter that converts the process signal and the temperature signal into a digital signal, and a code generation circuit that generates and outputs a driving code for controlling a level of a voltage at an output node according to the digital signal of the converter and a data signal. The impedance calibration device further includes an output driver that pulls up or pulls down the voltage at the output node according to the driving code.

Embodiments are directed to a system for synchronizing switching events. The system includes a controller, a clock generator communicatively coupled to the controller and a delay chain communicatively coupled to the controller. The delay chain is configured to perform a plurality of delay chain switching events in response to an input to the delay chain. The controller is configured to initiate a synchronization phase that includes enabling the clock generator to provide as an input to the delay chain a clock generator output at a synchronization frequency, wherein the clock generator output passing through the delay chain synchronizes the plurality of delay chain switching events to occur at the synchronization frequency resulting in a frequency of an output of the delay chain being synchronized to the synchronization frequency of the clock generator output.

First and second circuits, a photocoupler and a substrate temperature monitor circuit are formed on a substrate. A photocoupler includes a primary-side light emitting diode that converts an electric signal received from the first circuit into an optical signal, and a light receiving device that converts the optical signal into an electric signal and outputs the electric signal to the second circuit. The substrate temperature monitor circuit reads a Vf voltage value of the primary-side light emitting diode of the photocoupler to monitor temperature of the substrate.

First and second circuits, a photocoupler and a substrate temperature monitor circuit are formed on a substrate. A photocoupler includes a primary-side light emitting diode that converts an electric signal received from the first circuit into an optical signal, and a light receiving device that converts the optical signal into an electric signal and outputs the electric signal to the second circuit. The substrate temperature monitor circuit reads a Vf voltage value of the primary-side light emitting diode of the photocoupler to monitor temperature of the substrate.

A semiconductor chip includes a semiconductor device connected between a first node to which a power supply voltage is applied and a second node to which a ground voltage is applied, a first ring oscillator connected to the first node through a first supply switch and the second node through a first ground switch and a second ring oscillator connected to the first node through a second supply switch and the second node through a second ground switch, wherein the first supply and ground switches are configured to operate in response to a first control signal, thereby operating the first ring oscillator, and the second supply and ground switches are configured to operate in response to a second control signal, thereby operating the second ring oscillator.

A semiconductor chip includes a semiconductor device connected between a first node to which a power supply voltage is applied and a second node to which a ground voltage is applied, a first ring oscillator connected to the first node through a first supply switch and the second node through a first ground switch and a second ring oscillator connected to the first node through a second supply switch and the second node through a second ground switch, wherein the first supply and ground switches are configured to operate in response to a first control signal, thereby operating the first ring oscillator, and the second supply and ground switches are configured to operate in response to a second control signal, thereby operating the second ring oscillator.

Some embodiments include apparatus and methods using a package substrate and a die coupled to the package substrate. The package substrate includes conductive contacts, conductive paths coupled to the conductive contacts, and a resistor embedded in the package substrate. The die includes buffer circuits and a calibration module coupled to the buffer circuits and the resistor. The buffer circuits include output nodes coupled to the conductive contacts through the conductive paths. The calibration module is configured to perform a calibration operation to adjust resistances of the buffer circuits based on a value of a voltage at a terminal of the resistor during the calibration operation.