A range sensor and a method thereof. The range sensor includes a light source configured to project a plurality of sheets of light at an angle within a field of view (FOV); an image sensor, wherein the image sensor is offset from the light source; collection optics; and a controller connected to the light source, the image sensor, and the collection optics, and configured to simultaneously determine a range of a distant object based on direct time-of-flight (TOF) and a range of a near object based on triangulation.

A range sensor and a method thereof. The range sensor includes a light source configured to project a plurality of sheets of light at an angle within a field of view (FOV); an image sensor, wherein the image sensor is offset from the light source; collection optics; and a controller connected to the light source, the image sensor, and the collection optics, and configured to simultaneously determine a range of a distant object based on direct time-of-flight (TOF) and a range of a near object based on triangulation.

According to one general aspect, an apparatus may include a latch circuit configured to, depending in part upon a state of an enable signal, substantially pass the first clock signal to an output signal. The latch circuit may include at least two transistors configured to essentially perform a NAND function and controlled by a second clock signal, wherein the at least two transistors are configured to alter the timing of the substantial passing of the first clock signal to the output signal.

According to one general aspect, an apparatus may include a latch circuit configured to, depending in part upon a state of an enable signal, substantially pass the first clock signal to an output signal. The latch circuit may include at least two transistors configured to essentially perform a NAND function and controlled by a second clock signal, wherein the at least two transistors are configured to alter the timing of the substantial passing of the first clock signal to the output signal.

An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a main PMOS branch that charges an intermediate node of the Schmitt trigger responsive to voltage transitions at the input node. The Schmitt trigger includes a charging assistance circuit that helps to rapidly charge the intermediate node of the Schmitt trigger. The charging assistance circuit includes a parallel PMOS branch in parallel with the main PMOS branch.

An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a main PMOS branch that charges an intermediate node of the Schmitt trigger responsive to voltage transitions at the input node. The Schmitt trigger includes a charging assistance circuit that helps to rapidly charge the intermediate node of the Schmitt trigger. The charging assistance circuit includes a parallel PMOS branch in parallel with the main PMOS branch.

The disclosure provides an electronic device including a driver circuit and a driving method thereof. The driver circuit includes an electronic unit, a driver unit, and a detection and protection circuit. The driver unit is electrically connected to the electronic unit. The detection and protection circuit is electrically connected to the electronic unit through a first node, and is electrically connected to a gate terminal of the driver unit through a second node. When a voltage of the first node is pulled down, the detection and protection circuit controls the driver unit to be turned off. The detection and protection circuit of the driver circuit of the disclosure protects the electronic unit from excessive current.

The disclosure provides an electronic device including a driver circuit and a driving method thereof. The driver circuit includes an electronic unit, a driver unit, and a detection and protection circuit. The driver unit is electrically connected to the electronic unit. The detection and protection circuit is electrically connected to the electronic unit through a first node, and is electrically connected to a gate terminal of the driver unit through a second node. When a voltage of the first node is pulled down, the detection and protection circuit controls the driver unit to be turned off. The detection and protection circuit of the driver circuit of the disclosure protects the electronic unit from excessive current.

In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.

In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.