Patent classifications
H03K3/014
LOW POWER TRANSMITTER OSCILLATOR CIRCUITS AND METHODS
A fast startup power oscillator transmitter includes a transistor pair that drives a resonant circuit including a tunable capacitance. A capacitor array preferably forms the tunable capacitance. A voltage booster activates the capacitor array. A clamped body bias voltage booster can set the body bias voltage of the transistor pair in one circuit. Control circuitry activates the resonant circuit through a triode-mode switch transistor in response to an input in a range of 0.3-0.6V, and preferably while controlling the substrate bias voltage of the transistor pair to increase transconductance of the cross-coupled transistor pair. In a variation, a circuit pushes a top plate voltage of one of the two capacitors to 2 V.sub.DD and pulls the top plate voltage of the other to zero to give the oscillator an initial condition. In a variation, a shaped pulse drives the transistor pair to switch to a class D oscillator mode, and the triode mode switch transistor is only turned on when the oscillation signal voltage is in the range of 0.3-0.6V.
LOW POWER TRANSMITTER OSCILLATOR CIRCUITS AND METHODS
A fast startup power oscillator transmitter includes a transistor pair that drives a resonant circuit including a tunable capacitance. A capacitor array preferably forms the tunable capacitance. A voltage booster activates the capacitor array. A clamped body bias voltage booster can set the body bias voltage of the transistor pair in one circuit. Control circuitry activates the resonant circuit through a triode-mode switch transistor in response to an input in a range of 0.3-0.6V, and preferably while controlling the substrate bias voltage of the transistor pair to increase transconductance of the cross-coupled transistor pair. In a variation, a circuit pushes a top plate voltage of one of the two capacitors to 2 V.sub.DD and pulls the top plate voltage of the other to zero to give the oscillator an initial condition. In a variation, a shaped pulse drives the transistor pair to switch to a class D oscillator mode, and the triode mode switch transistor is only turned on when the oscillation signal voltage is in the range of 0.3-0.6V.
OSCILLATOR CIRCUIT ARRANGEMENT
An oscillator circuit arrangement comprises an inverter having input and output terminals that are to be connected to a crystal device. An automatic gain control device controls a current source that supplies current to the inverter. First and second diode devices having different orientation are connected between the input and the output of the inverter. The oscillator consumes low power and has a fast recovery time after an electromagnetic interference event. The oscillator can be used in electronic labels.
Semiconductor device and electronic device each having oscillator
An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.
Semiconductor device and electronic device each having oscillator
An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.
Control circuit for load switch
A control circuit of a load switch including a charge pump circuit, an oscillator, and a current signal generator is provided. The charge pump circuit generates a control signal according to a clock signal. The load switch is turned on or turned off according to the control signal. The oscillator generates the clock signal according to a control current. The current signal generator provides a resistor string to receive a power voltage. The resistor string of the current signal generator generates a sensed current or a sensed voltage according to the power voltage. The current signal generator generates the control current according to a reciprocal of the sensed current or a square of the sensed voltage. A frequency of the clock signal is negatively related to the power voltage.
Multiphase oscillator circuit
In described examples, a ring oscillator includes a series of N stages in a first ring. Each stage includes a respective output terminal coupled to a respective input terminal of a next one of the stages in the first ring. N is a positive odd-numbered integer of at least three. A series of N level shifters in a second ring are respectively connected to the N stages. Each level shifter receives a respective clock output from a respective output terminal of a stage to which it is connected and generates a respective boosted clock output in response thereto. The boosted clock output is coupled to control an impedance state of a next one of the level shifters in the second ring.
Multiphase oscillator circuit
In described examples, a ring oscillator includes a series of N stages in a first ring. Each stage includes a respective output terminal coupled to a respective input terminal of a next one of the stages in the first ring. N is a positive odd-numbered integer of at least three. A series of N level shifters in a second ring are respectively connected to the N stages. Each level shifter receives a respective clock output from a respective output terminal of a stage to which it is connected and generates a respective boosted clock output in response thereto. The boosted clock output is coupled to control an impedance state of a next one of the level shifters in the second ring.
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.