A novel and useful look-ahead time to digital converter (TDC) that is applied to an all digital phase locked loop (ADPLL) as the fractional phase error detector. The deterministic nature of the phase error during frequency/phase lock is exploited to achieve a reduction in power consumption of the TDC. The look-ahead TDC circuit is used to construct a cyclic DTC-TDC pair which functions to reduce fractional spurs of the output spectrum in near-integer channels by randomly rotating the cyclic DTC-TDC structure so that it starts from a different point every reference clock thereby averaging out the mismatch of the elements. Associated rotation and dithering methods are also presented. The ADPLL is achieved using the look-ahead TDC and/or cyclic DTC-TDC pair circuit.

A semiconductor device includes: an internal voltage generation block suitable for generating an internal voltage based on first and second external voltages whose power-up sections are different from each other; and a control block suitable for fixing the internal voltage to a predetermined voltage level during a control section including a first power-up section of the first external voltage and a second power-up section of the second external voltage.

A drive circuit includes a gate drive node, a power source node, and an output transistor connected between the gate drive node and the power source node that flows a current into the gate drive node. The drive circuit further includes an input transistor smaller than the output transistor that forms a current mirror with the output transistor. The drive circuit further includes an operational amplifier that outputs a control voltage depending on a potential difference between a voltage of the gate drive node and a constant voltage lower than a voltage of the power source node. The drive circuit further includes a control transistor including a control electrode receiving an output of the operational amplifier that is connected in series with the input transistor. The drive circuit further includes a constant current source connected in series with the control transistor.

A drive circuit includes a gate drive node, a power source node, and an output transistor connected between the gate drive node and the power source node that flows a current into the gate drive node. The drive circuit further includes an input transistor smaller than the output transistor that forms a current mirror with the output transistor. The drive circuit further includes an operational amplifier that outputs a control voltage depending on a potential difference between a voltage of the gate drive node and a constant voltage lower than a voltage of the power source node. The drive circuit further includes a control transistor including a control electrode receiving an output of the operational amplifier that is connected in series with the input transistor. The drive circuit further includes a constant current source connected in series with the control transistor.

A data output circuit of a semiconductor apparatus includes a pull-up driver including a first plurality of leg units commonly electrically coupled to a data output pad and configured to pull up the data output pad in response to a first code signals, a pull-down driver including a second plurality of leg units commonly electrically coupled to the data output pad and configured to pull down the data output pad to a second code signals, and a code generator configured to generate the first and second code signals. The code generator generates the second code signals by comparing a replica voltage to a reference voltage.

The present invention relates an implantable pulse generator comprising an electric circuit, wherein the electric circuit comprises: a primary energy store, at least one secondary energy store, and a control unit, wherein the control unit is configured to activate an electric switch in the electric circuit in such a way that, in a first interval of a first phase of a pulse delivery, the primary energy store is discharged via a therapeutic current path, and to activate an electric switch in the electric circuit in such a way that, in a second interval of the first phase of the pulse delivery, the secondary energy store is discharged via the therapeutic current path, wherein the primary energy store and the at least one secondary energy store are fixedly connected, or connectable, in series, and wherein the implantable pulse generator is designed to deliver a shock having an approximately rectangular pulse waveform.

The present invention relates an implantable pulse generator comprising an electric circuit, wherein the electric circuit comprises: a primary energy store, at least one secondary energy store, and a control unit, wherein the control unit is configured to activate an electric switch in the electric circuit in such a way that, in a first interval of a first phase of a pulse delivery, the primary energy store is discharged via a therapeutic current path, and to activate an electric switch in the electric circuit in such a way that, in a second interval of the first phase of the pulse delivery, the secondary energy store is discharged via the therapeutic current path, wherein the primary energy store and the at least one secondary energy store are fixedly connected, or connectable, in series, and wherein the implantable pulse generator is designed to deliver a shock having an approximately rectangular pulse waveform.