Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electrically coupled with the switch; an antenna electrically coupled with the nonlinear transmission line; and an energy recovery circuit comprising a diode and an inductor electrically coupled with the power supply and the antenna.

Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electrically coupled with the switch; an antenna electrically coupled with the nonlinear transmission line; and an energy recovery circuit comprising a diode and an inductor electrically coupled with the power supply and the antenna.

There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

A method includes detecting a signal on a switching node connected to a power switch, detecting a gate drive voltage of the power switch, during a gate drive process of the power switch, reducing a gate drive current based on a first comparison result obtained from comparing the signal with a first threshold, and during the gate drive process of the power switch, increasing the gate drive current based on a second comparison result obtained from comparing the gate drive voltage with a second threshold.

A method includes detecting a signal on a switching node connected to a power switch, detecting a gate drive voltage of the power switch, during a gate drive process of the power switch, reducing a gate drive current based on a first comparison result obtained from comparing the signal with a first threshold, and during the gate drive process of the power switch, increasing the gate drive current based on a second comparison result obtained from comparing the gate drive voltage with a second threshold.

A quadrature error correction circuit includes a duty cycle adjusting circuit, a phase interpolator, a phase detector, and a delay control circuit. The duty cycle adjusting circuit generates a first corrected clock signal and a second corrected clock signal whose skew and duty cycle error are concurrently adjusted by adjusting a delay of edges of a second clock signal and adjusting a delay of a falling edge of a first clock signal based on first through fourth control code sets. The phase interpolator generates a second delayed and selected clock signal by delaying a second selected clock signal selected from first through fourth adjusted clock signals. A phase detector detects a phase difference between a first selected clock signal and the second delayed and selected clock signal to generate an up/down signal. The delay control circuit generates the first through fourth control code sets based on the up/down signal.

A circuit includes first to third transistors. The first transistor includes a first terminal coupled to a first voltage, and a second terminal coupled to a connection. The second transistor includes a gate terminal coupled to the gate terminal of the first transistor, a first terminal coupled to a second voltage, and a second terminal coupled to the connection. The third transistor includes a first terminal coupled to the connection, a second terminal coupled to a node between the second terminals of the first and second transistors. The third transistor is controlled to be turned ON at a beginning of a first edge of a driving signal on the connection to pull a voltage of the driving signal on the first edge toward a threshold voltage, and be turned OFF in response to and after the voltage of the driving signal on the first edge reaching the threshold voltage.

A circuit includes first to third transistors. The first transistor includes a first terminal coupled to a first voltage, and a second terminal coupled to a connection. The second transistor includes a gate terminal coupled to the gate terminal of the first transistor, a first terminal coupled to a second voltage, and a second terminal coupled to the connection. The third transistor includes a first terminal coupled to the connection, a second terminal coupled to a node between the second terminals of the first and second transistors. The third transistor is controlled to be turned ON at a beginning of a first edge of a driving signal on the connection to pull a voltage of the driving signal on the first edge toward a threshold voltage, and be turned OFF in response to and after the voltage of the driving signal on the first edge reaching the threshold voltage.

In a transistor turnoff system, a transistor control circuit is configured to adjust a control voltage at a transistor control output responsive to a comparison signal at a control input. The control voltage has a slew rate. A comparator has a comparator output and first and second comparator inputs. The first comparator input is coupled to the transistor control output. The comparator is configured to: provide the comparison signal at the comparator output based on a reference voltage at the second comparator input; and deactivate the transistor control circuit by changing a state of the comparison signal responsive to the control voltage falling below the reference voltage. A slew-rate compensator is configured to increase the reference voltage by a compensation voltage that compensates for a time delay of the comparator or the transistor control circuit. The compensation voltage is proportional to the slew rate.

A slew rate control device for controlling a slew rate, includes: a setting part configured to set a voltage value used to determine the slew rate, and a control part configured to control the slew rate, based on the voltage value set by the setting part, so that the slew rate becomes slower as an output voltage of a power supply approaches from a transition starting voltage to a target voltage.