The present invention relates to a differential envelope detector, which comprises: input terminals for separating cathode and anode components from a signal and receiving same; a first voltage output unit for outputting a first common mode voltage between the input terminals; a first amplification unit, which receives an input signal as a differential pair and amplifies same so as to output a first output signal; a second amplification unit, which receives the first common mode voltage so as to output a second output signal; and a second voltage output unit for outputting a second common mode voltage between a constant current source unit and an output terminal, wherein the output size of the detector is hardly affected by temperature changes, and an output DC voltage is also fixed so as to be effective with respect to input bias of the next stage amplifier.

The present invention relates to a differential envelope detector, which comprises: input terminals for separating cathode and anode components from a signal and receiving same; a first voltage output unit for outputting a first common mode voltage between the input terminals; a first amplification unit, which receives an input signal as a differential pair and amplifies same so as to output a first output signal; a second amplification unit, which receives the first common mode voltage so as to output a second output signal; and a second voltage output unit for outputting a second common mode voltage between a constant current source unit and an output terminal, wherein the output size of the detector is hardly affected by temperature changes, and an output DC voltage is also fixed so as to be effective with respect to input bias of the next stage amplifier.

A single configuration terminal of a device is used to configure multiple operating parameters of the device based on a resistor and a capacitor selectively connected to the configuration terminal. The device includes a detection circuit configured to monitor a voltage signal at the configuration terminal to determine multiple values in response to a regulated current source providing a current to the configuration terminal selectively connected to the resistor and the capacitor in parallel, and configure multiple operating parameters based on the determined values. A method for configuring operating parameters using a single configuration terminal of a device includes providing a current to the configuration terminal selectively connected to a resistor and a capacitor in parallel, monitoring a voltage signal at the configuration terminal, determining multiple values based on the monitoring, and configuring multiple operating parameter based on the determined values.

A single configuration terminal of a device is used to configure multiple operating parameters of the device based on a resistor and a capacitor selectively connected to the configuration terminal. The device includes a detection circuit configured to monitor a voltage signal at the configuration terminal to determine multiple values in response to a regulated current source providing a current to the configuration terminal selectively connected to the resistor and the capacitor in parallel, and configure multiple operating parameters based on the determined values. A method for configuring operating parameters using a single configuration terminal of a device includes providing a current to the configuration terminal selectively connected to a resistor and a capacitor in parallel, monitoring a voltage signal at the configuration terminal, determining multiple values based on the monitoring, and configuring multiple operating parameter based on the determined values.

A method for operating a phase shifter chip RF self-test. The method includes outputting, by control hardware, a first signal from a phased locked loop to a pre-amplifier and an input peak detector, outputting, by the control hardware, a second signal from the pre-amplifier to a device under test, selecting, by the control hardware, a target level, and adjusting, by the control hardware, a pre-amplifier gain of the pre-amplifier to cause the input peak detector value to approximately match the target level. The input peak detector is configured to output an input peak detector value based on the first signal.

A method for operating a phase shifter chip RF self-test. The method includes outputting, by control hardware, a first signal from a phased locked loop to a pre-amplifier and an input peak detector, outputting, by the control hardware, a second signal from the pre-amplifier to a device under test, selecting, by the control hardware, a target level, and adjusting, by the control hardware, a pre-amplifier gain of the pre-amplifier to cause the input peak detector value to approximately match the target level. The input peak detector is configured to output an input peak detector value based on the first signal.

A phased array antenna system includes an array of antennas having first antenna and second antennas disposed equidistantly from a third antenna. The first antenna is associated with a first gain and a first phase and the second antenna is associated with a second gain and a second phase. The first antenna receives a first reference signal corresponding to a calibration reference signal transmitted by the third antenna, and the second antenna receives a second reference signal corresponding to the calibration reference signal transmitted by the third antenna. The second receiver module is configured to adjust the second gain and the second phase associated with the second antenna to match the first gain and the first phase associated with the first antenna by comparing the first reference signal received by the first antenna with the second reference signal received by the second antenna.

A phased array antenna system includes an array of antennas having first antenna and second antennas disposed equidistantly from a third antenna. The first antenna is associated with a first gain and a first phase and the second antenna is associated with a second gain and a second phase. The first antenna receives a first reference signal corresponding to a calibration reference signal transmitted by the third antenna, and the second antenna receives a second reference signal corresponding to the calibration reference signal transmitted by the third antenna. The second receiver module is configured to adjust the second gain and the second phase associated with the second antenna to match the first gain and the first phase associated with the first antenna by comparing the first reference signal received by the first antenna with the second reference signal received by the second antenna.

A low-loss current sensor for use with a circuit containing a capacitor to sense a current flowing into a node in the circuit is provided. The current sensor includes a differentiator circuit having an input connected to the circuit capacitor and adapted to generate an output which is proportional to the current flowing through the circuit capacitor. The novel use of a capacitive current divider allows the sensor to sense current with virtually no power dissipation.

A low-loss current sensor for use with a circuit containing a capacitor to sense a current flowing into a node in the circuit is provided. The current sensor includes a differentiator circuit having an input connected to the circuit capacitor and adapted to generate an output which is proportional to the current flowing through the circuit capacitor. The novel use of a capacitive current divider allows the sensor to sense current with virtually no power dissipation.