A circuit and method for providing an improved current monitoring circuit for a switching regulator. A circuit providing switching regulation with an improved current monitor, comprising a pulse width modulation (PWM) controller configured to provide P- and N-drive signals, an output stage connected to said PWM controller and configured to provide switching, comprising a high-side and low-side transistor, driven by said P- and N-drive signals, respectively, a sense circuit configured to provide output current sensing from the output stage during a sampling period when the N-drive signal is active, and a sampling timing generator configured to provide a an n-sampling signal, nsample, to the sense circuit, wherein a start of the n-sampling signal is delayed by a first delay after the sampling period and the n-sampling signal is ended prior to an end of the sampling period by a second delay.

An electric working machine according to one aspect of the present disclosure comprises a motor, a rectifier circuit, a capacitor, a series switching element, a resistive element, a drive circuit, a peak voltage value acquirer, and a controller. The capacitor smooths power rectified by the rectifier circuit. The series switching element is coupled in series with the capacitor. The resistive element is coupled in parallel with the series switching element. The controller brings the series switching element into conduction in a case where AC power is inputted to the rectifier circuit and where a specified conducting condition based on a peak voltage value acquired by the peak voltage value acquirer is satisfied.

An electric working machine according to one aspect of the present disclosure comprises a motor, a rectifier circuit, a capacitor, a series switching element, a resistive element, a drive circuit, a peak voltage value acquirer, and a controller. The capacitor smooths power rectified by the rectifier circuit. The series switching element is coupled in series with the capacitor. The resistive element is coupled in parallel with the series switching element. The controller brings the series switching element into conduction in a case where AC power is inputted to the rectifier circuit and where a specified conducting condition based on a peak voltage value acquired by the peak voltage value acquirer is satisfied.

A semiconductor integrated circuit device includes: a zero-crossing detection unit configured to compare a first monitoring target signal and a second monitoring target signal respectively input through diodes from a first node and a second node between which an AC signal is applied, so as to generate a comparison signal; a logic unit configured to count a period of the comparison signal and estimate a zero-cross of the AC signal using the count value, so as to generate a zero-crossing detection signal; and a monitoring unit configured to adjust the first monitoring target signal and the second monitoring target signal to be suitable for input to the zero-crossing detection unit, where a first chip, in which the monitoring unit is integrated, is cut out in a rectangular shape having a substantially equal ratio between a short side and a long side in a plan view.

A semiconductor integrated circuit device includes: a zero-crossing detection unit configured to compare a first monitoring target signal and a second monitoring target signal respectively input through diodes from a first node and a second node between which an AC signal is applied, so as to generate a comparison signal; a logic unit configured to count a period of the comparison signal and estimate a zero-cross of the AC signal using the count value, so as to generate a zero-crossing detection signal; and a monitoring unit configured to adjust the first monitoring target signal and the second monitoring target signal to be suitable for input to the zero-crossing detection unit, where a first chip, in which the monitoring unit is integrated, is cut out in a rectangular shape having a substantially equal ratio between a short side and a long side in a plan view.

The present application relates to a gate driver including a zero-crossing detection circuit and a control signal generation circuit. The zero-crossing detection circuit receives a load current signal indicative of a load current of a power switch, detects a zero crossing of the load current, and generates a zero-crossing detection signal based on the detected zero-crossing. The control signal generation circuit receives an input control signal indicative of one of a turn-on and a turn-off of the power switch. If the input control signal is indicative of the turn-off of the power switch, the control signal generation circuit generates a turn-off signal based on the zero-crossing detection signal, determines if a time-out interval subsequent to the indication of the turn-off has expired, generates the turn-off signal regardless of the zero-crossing detection signal if the turn-off time interval has expired, and provides the turn-off signal to the power switch.

The present application relates to a gate driver including a zero-crossing detection circuit and a control signal generation circuit. The zero-crossing detection circuit receives a load current signal indicative of a load current of a power switch, detects a zero crossing of the load current, and generates a zero-crossing detection signal based on the detected zero-crossing. The control signal generation circuit receives an input control signal indicative of one of a turn-on and a turn-off of the power switch. If the input control signal is indicative of the turn-off of the power switch, the control signal generation circuit generates a turn-off signal based on the zero-crossing detection signal, determines if a time-out interval subsequent to the indication of the turn-off has expired, generates the turn-off signal regardless of the zero-crossing detection signal if the turn-off time interval has expired, and provides the turn-off signal to the power switch.

An apparatus may include global control module, the global control module including a digital master clock generator and a master waveform generator. The apparatus may also include a plurality of resonator control modules, coupled to the global control module. A given resonator control module of the plurality of resonator control modules may include a synchronization module, having a first input coupled to receive a resonator output voltage pickup signal from a local resonator, a second input coupled to receive a digital master clock signal from the digital master clock generator, and a first output coupled to send a delay signal to the master waveform generator.

An apparatus may include global control module, the global control module including a digital master clock generator and a master waveform generator. The apparatus may also include a plurality of resonator control modules, coupled to the global control module. A given resonator control module of the plurality of resonator control modules may include a synchronization module, having a first input coupled to receive a resonator output voltage pickup signal from a local resonator, a second input coupled to receive a digital master clock signal from the digital master clock generator, and a first output coupled to send a delay signal to the master waveform generator.

Provided is a station device configured to detect a first zero crossing point (ZCP) and a second ZCP with respect to an alternating current (AC) input voltage, by using a ZCP circuit configured to detect a ZCP of the AC input voltage applied to the station device, obtain information about a pulse width from the first ZCP to the second ZCP, identify whether the AC input voltage is in an overvoltage state, based on the information about the pulse width from the first ZCP to the second ZCP, and deactivate an operation of the suction motor, when the AC input voltage is in the overvoltage state. Where detecting the first ZCP and the second ZCP includes detecting voltage points which are offset from 0 V by a preset value in the AC input voltage.