An audio amplifier circuit for providing an output signal to an audio transducer may include a power amplifier and a control circuit. The power amplifier may include an audio input for receiving an audio input signal, an audio output for generating the output signal based on the audio input signal, and a power supply input for receiving a power supply voltage, wherein the power supply voltage is variable among at least a first supply voltage and a second supply voltage greater than the first supply voltage. The control circuit may be configured to predict, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the power supply voltage, and responsive to predicting the occurrence of the condition, change, at an approximate zero crossing of the signal indicative of the output signal, the power supply voltage.

An audio amplifier circuit for providing an output signal to an audio transducer may include a power amplifier and a control circuit. The power amplifier may include an audio input for receiving an audio input signal, an audio output for generating the output signal based on the audio input signal, and a power supply input for receiving a power supply voltage, wherein the power supply voltage is variable among at least a first supply voltage and a second supply voltage greater than the first supply voltage. The control circuit may be configured to predict, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the power supply voltage, and responsive to predicting the occurrence of the condition, change, at an approximate zero crossing of the signal indicative of the output signal, the power supply voltage.

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

A zero-crossing detection circuit includes a zero-crossing detection unit arranged to compare a first monitoring target signal and a second monitoring target signal respectively input through diodes from a first node and a second node between which an AC signal is applied, so as to generate a first comparison signal, and a logic unit arranged to estimate a zero cross of the AC signal from the first comparison signal so as to generate a zero-crossing detection signal. The zero-crossing detection circuit preferably includes a monitoring unit arranged to adjust the first monitoring target signal and the second monitoring target signal to be suitable for input to the zero-crossing detection unit. The logic unit preferably counts a period of the first comparison signal and estimates a zero cross of the AC signal using a count value thereof.

A zero-crossing detection circuit includes a zero-crossing detection unit arranged to compare a first monitoring target signal and a second monitoring target signal respectively input through diodes from a first node and a second node between which an AC signal is applied, so as to generate a first comparison signal, and a logic unit arranged to estimate a zero cross of the AC signal from the first comparison signal so as to generate a zero-crossing detection signal. The zero-crossing detection circuit preferably includes a monitoring unit arranged to adjust the first monitoring target signal and the second monitoring target signal to be suitable for input to the zero-crossing detection unit. The logic unit preferably counts a period of the first comparison signal and estimates a zero cross of the AC signal using a count value thereof.

In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.

Circuitry, which includes a parallel amplifier and a switching supply, is disclosed. The parallel amplifier regulates a power supply output voltage based on a power supply control signal and provides a current sense signal, which is representative of a parallel amplifier output current from the parallel amplifier. The switching supply is coupled to the parallel amplifier. The switching supply provides a switching output voltage and makes an early determination of the switching output voltage using the current sense signal and the power supply control signal to at least partially compensate for delay in the switching supply. Additionally, the switching supply drives the parallel amplifier output current toward zero using the switching output voltage to increase efficiency.

Circuitry, which includes a parallel amplifier and a switching supply, is disclosed. The parallel amplifier regulates a power supply output voltage based on a power supply control signal and provides a current sense signal, which is representative of a parallel amplifier output current from the parallel amplifier. The switching supply is coupled to the parallel amplifier. The switching supply provides a switching output voltage and makes an early determination of the switching output voltage using the current sense signal and the power supply control signal to at least partially compensate for delay in the switching supply. Additionally, the switching supply drives the parallel amplifier output current toward zero using the switching output voltage to increase efficiency.