H03K17/0406

SLEW RATE CONTROL FOR FAST SWITCHING OUTPUT STAGES
20230261645 · 2023-08-17 ·

A drive circuit configured to apply a slew rate controlled drive signal to the control terminal of a power transistor. The drive circuit may be part of a system that includes one or more sub-circuits in which each sub-circuit includes a regulation loop, a matched replica of the power transistor and regulated voltage node. The voltage reference voltage for each sub-circuit connects to the control terminal of the power switch through a buffer circuit to apply a sequence of voltages to the control terminal of the power switch. A switching controller circuit may manage the operation of the one or more sub-circuits so that the drive circuit may output a precisely controlled voltage profile to the control terminal of the power transistor. The circuit may include a second buffer under the control of the switching controller circuit to further manage the operation of the power transistor.

Actively tracking switching speed control and regulating switching speed of a power transistor during turn-on

A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

Gate drive control method for SiC and IGBT power devices to control desaturation or short circuit faults

A gate-drive controller for a power semiconductor device includes a master control unit (MCU) and one or more comparators that compare the output signal of the power semiconductor device to a reference value generated by the MCU. The MCU, in response to a turn-off trigger signal, generates a first intermediate drive signal for the power semiconductor device and generates a second intermediate drive signal, different from the first drive signal, when a DSAT signal indicates that the power semiconductor device is experiencing de-saturation. The MCU generates a final drive signal for the power semiconductor when the output signal of the one or more comparators indicates that the output signal of the power semiconductor device has changed relative to the reference value. The controller may also include a timer that causes the drive signals to change in predetermined intervals when the one or more comparators do not indicate a change.

DRIVER FOR INSULATED GATE TRANSISTOR WITH CIRCUIT FOR COMPENSATING FOR TIME DELAYS
20230283272 · 2023-09-07 ·

A power stage includes a power transistor and a driver, the power transistor comprising a collector, a gate and an emitter and being configured to change over from a saturated state to an off state and vice versa in accordance with a control from the driver, the power stage comprising a resistor Rg positioned between the driver and the gate, the power stage comprising a circuit for compensating for delays that is positioned in parallel with the resistor Rg, comprising: a circuit for compensating for turn-on initialization delays, which is configured to divert the current from the resistor Rg when a saturation of the power transistor is initialized, a circuit for compensating for turn-off initialization delays, which is configured to divert the current from the resistor Rg when a switching-off of the power transistor is initialized, a circuit for compensating for delays that is configured to divert the current from the resistor Rg when the power transistor is close to the saturated state.

METHOD FOR REDUCING OSCILLATION DURING TURN ON OF A POWER TRANSISTOR BY REGULATING THE GATE SWITCHING SPEED CONTROL OF ITS COMPLEMENTARY POWER TRANSISTOR

A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.

ACTIVELY TRACKING SWITCHING SPEED CONTROL AND REGULATING SWITCHING SPEED OF A POWER TRANSISTOR DURING TURN-ON

A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to control a gate voltage to generate an on-current during a plurality of turn-on switching events to turn on the transistor. The gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage, and a second driver configured to, during a boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage. A control circuit measures a transistor parameter representative of a reverse recovery current of the transistor for a turn-on switching event during which the transistor is transitioned to an on state and controls the first driver and controls the second driver based on the measured transistor parameter.

Vehicle warm-up control apparatus
11425792 · 2022-08-23 · ·

A vehicle warm-up control apparatus includes: a motor; an inverter; an electric storage device; a boost converter connected to a low-voltage-side power line and a high-voltage-side power liner; and a control unit for controlling the inverter and the boost converter, the boost converter including a first switching device as an upper arm, a second switching device as a lower arm, and a reactor. Further, the second switching device is composed of a semiconductor device variable in resistance value, and when warm-up is requested, the control unit executes warm-up control to set the resistance value of the second switching device higher than the resistance value during operation when the warm-up is not requested, and supply heat generated in the second switching device by passing current through the second switching device to a device for which the warm-up is requested.

Power converting apparatus, and vehicle including the same
11462989 · 2022-10-04 · ·

A power converting apparatus and a vehicle including the same according to an embodiment of the present disclosure includes a switching element; and a gate drive unit configured to apply a gate driving signal for driving the switching element to a gate terminal of the switching element, wherein the gate drive unit includes: a current source unit including a source current for sourcing current to the gate terminal in a turn-on section of the switching element, and a sink current for sinking current from the gate terminal in a turn-off section of the switching element; a control current for sinking the current from the gate terminal during a partial section of the turn-on section and the turn-off section of the switching element; and a control current controller configured to control an operation of the control current.

Actively tracking switching speed control and regulating switching speed of a power transistor during turn-on

A gate driver system includes a gate driver circuit coupled to a gate terminal of a transistor and configured to generate an on-current during a plurality of turn-on switching events to turn on the transistor, wherein the gate driver circuit includes a first driver configured to source a first portion of the on-current to the gate terminal to charge a first portion of the gate voltage and a second driver configured to, during a first boost interval, source a second portion of the on-current to the gate terminal to charge a second portion of the gate voltage; a measurement circuit configured to measure a transistor parameter indicative of an oscillation of a load current for a turn-on switching event; and a controller configured to receive the measured transistor parameter and regulate a length of the first boost interval based on the measured transistor parameter.

EFFICIENT IGBT SWITCHING

Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed.