A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 μs, and at a pulse frequency greater than 10 kHz.

A gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors are provided. A dynamic voltage equalization of series-connected power switch transistors is implemented by using sampling principles where voltages of the power switch transistors are controlled by gate voltage magnitude and unbalanced voltage differentials are converted into unbalanced current differentials of buffer currents. The gate voltage magnitude compensation equalization method and circuit relates to differential control and works in a dynamic voltage change process of the series-connected power switch transistors, without having a negative effect on operation of the power switch transistors under normal operating conditions. Only adopting passive devices, the gate voltage magnitude compensation equalization circuit has a simple structure, is easy to integrate on a device drive board, implements response tracking of unbalanced voltage and voltage equalization of the series-connected power switch transistors, and improve speedability and stability of voltage equalization control.

A power electronics device has a first power semiconductor switch and a driver circuit and enables a supply of electrical voltage to a driver circuit. An auxiliary circuit arrangement has a supply capacitor, an auxiliary capacitor, a normally off auxiliary semiconductor switch, a diode and a bootstrap diode. The auxiliary semiconductor switch is connected to a reference potential connection of the first power semiconductor switch via a connection point, starting from the connection point, a series connection of the diode, a second connection point and the auxiliary capacitor is arranged in parallel with the auxiliary semiconductor switch. When the auxiliary semiconductor switch is in the off state, the auxiliary capacitor is charged by the flow of current through the first power semiconductor switch.

A controller (3) includes an AC voltage generator (12) that generates first to Nth AC voltages, a DC voltage generator (13) that converts the first to Nth AC voltages into first to Nth DC voltages, respectively, and a driver (14) that turns on and off a switch (1) based on the first to Nth DC voltages. The AC voltage generator (12) includes first to Nth isolation transformers (T1 to TN). The primary windings of the nth and (n+1)th isolation transformers receive an AC source voltage. The nth to first isolation transformers are sequentially connected. The (n+1)th to Nth isolation transformers are sequentially connected. The first to Nth isolation transformers respectively output the first to Nth AC voltages from their respective secondary windings.

This disclosure relates to a discrete semiconductor device and associated method of manufacture, the discrete semiconductor device includes: a high voltage depletion mode device die; and a low voltage enhancement mode device die connected in cascode configuration with the high voltage depletion mode device die. The high voltage depletion mode device includes a gate, source and drain terminals arranged on a first surface thereof and the gate source and drain terminals are inverted with respect to the low voltage enhancement mode device die and the low voltage device is arranged adjacent to the high voltage device.

A semiconductor unit includes a semiconductor device, a controller, and a resistor. The semiconductor device includes a transistor arranged between a positive electrode of a battery and an inverter circuit electrically connected to the battery. The controller is connected to a control terminal of the transistor and configured to control the transistor. The resistor arranged between the control terminal and the controller. The controller controls the transistor so that when a current flowing to the transistor is greater than or equal to a threshold value, the transistor is deactivated. The resistor has a resistance value that is greater than or equal to 100Ω.

Aspects of the invention relate to a high-power switching module for the direct pulse energy feeding of a consumer with a plurality of switching stages connected in series. A coupling element and an energy buffer store are provided, the coupling element coupling a primary circuit comprising a balancing capacitance and a semiconductor switch to a secondary circuit comprising the energy buffer store, the coupling element being provided and embodied for obtaining energy of the balancing capacitance and delivering this energy to the energy buffer store during the on phase of the semiconductor switch, and the energy buffer store being provided and embodied for delivering the obtained energy to an energy store of the driver assembly when the semiconductor switch is in the switched-off state.

The disclosure relates to a switch arrangement for a converter, comprises: a first series connection of at least two switches between two terminals of the switch arrangement, wherein the two switches are semiconductor switches; a second series connection of a first capacitor and a first diode circuit electrically connected in parallel to first part of the first series connection between a first terminal of the two terminals and node between the two switches, wherein the first diode circuit comprises at least one diode; and third series connection of a second capacitor and a second diode circuit electrically connected in parallel to a second part of the first series connection between second terminal of the two terminals and the node between the two switches, wherein the second diode circuit comprises at least one diode. Further a method for switching such a switch arrangement between the conducting state and the non-conducting state.

An electronic valve apparatus for a high voltage direct current, HVDC, power transmission system. The electronic valve apparatus includes a first device chain including a number of first devices connected in series between an input node and an output node. Each of the first devices has an asymmetric transfer function configured substantially to block current flow through the device in a first direction, and the first devices are connected such that they all block current flow in the same direction. The electronic valve apparatus also includes a second device chain including a number of second devices connected in series between the input node and the output node. Each of the second devices has an asymmetric transfer function configured substantially to block current flow through the device in a first direction, and the second devices are connected such that they all block current flow in the same direction.

A gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors are provided. A dynamic voltage equalization of series-connected power switch transistors is implemented by using sampling principles where voltages of the power switch transistors are controlled by gate voltage magnitude and unbalanced voltage differentials are converted into unbalanced current differentials of buffer currents. The gate voltage magnitude compensation equalization method and circuit relates to differential control and works in a dynamic voltage change process of the series-connected power switch transistors, without having a negative effect on operation of the power switch transistors under normal operating conditions. Only adopting passive devices, the gate voltage magnitude compensation equalization circuit has a simple structure, is easy to integrate on a device drive board, implements response tracking of unbalanced voltage and voltage equalization of the series-connected power switch transistors, and improve speedability and stability of voltage equalization control.