H03K17/122

Power electronic device with paralleled transistors and a multilayer ceramic power module

An electronic power device including transistors formed on a circuit assembly formed of a plurality of layers. The layers include gate drive layers, gate return layers, and power layers. A gate drive circuit is formed on the circuit assembly, and is connected to the gate and source of each of the transistors through the gate drive layers and the gate return layers. A voltage supply connection is provided to each of the plurality of transistors interleaved through the power layers. The circuit assembly includes a multilayer circuit board and/or a multilayer ceramic substrate. The ceramic substrate includes the power layers and transistors. The gate drive and return layers and gate drive circuit may be formed within the ceramic substrate or the circuit board. The ceramic substrate may be located in a modular housing. The circuit board may be outside the modular housing or inside the modular housing.

POWER SUPPLY CONTROL APPARATUS AND SEMICONDUCTOR FAILURE DETECTION METHOD
20230009865 · 2023-01-12 · ·

A power supply control apparatus detects a failure of a semiconductor switch element in a switching circuit having semiconductor series circuits each having semiconductor switch elements connected in series with reverse polarities. The power supply control apparatus includes a reference resistance value storing unit storing information on a combined resistance value between an input and an output of the switching circuit, a conduction current detection unit configured to detect a current flowing through the switching circuit, a potential difference detection unit configured to detect an input-output potential difference between the input and the output of the switching circuit, a voltage drop calculation unit configured to calculate an assumed voltage drop, a voltage comparison unit configured to compare the input-output potential difference with the assumed voltage drop, and a failure identification unit configured to identify a failure of the semiconductor switch element.

Efficient switching circuit

An apparatus includes a first leg having a plurality of transistors connected in series between a first node and a second node. Each of the plurality of transistors includes a respective body diode. The apparatus further includes a second leg connected between the first node and the second node and in parallel to the series connection of the plurality of transistors of the first leg. The second leg includes a first transistor. The second leg has lower reverse recovery losses relative to the first leg.

Hybrid boost converters

A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

Power switch arrangement

A power device can be structured with a power switch having multiple arrangements such that the power switch can operate as a power switch with the capability to measure properties of the power switch. An example power device can comprise a main arrangement of transistor cells and a sensor arrangement of sensor transistor cells. The main arrangement can be structured to operate as a power switch, with the transistor cells of the main arrangement having control nodes connected in parallel to receive a common control signal. The sensor arrangement of sensor transistor cells can be structured to measure one or more parameters of the main arrangement, with the sensor transistor cells having sensor control nodes connected in parallel to receive a common sensor control signal. The sensor transistor cells can have a common transistor terminal shared with a common transistor terminal of the transistor cells of the main arrangement.

DRIVING DEVICE
20230004179 · 2023-01-05 ·

A driving device includes a voltage regulator, a voltage generator, and a first NMOSFET. The voltage regulator is coupled between a first high-voltage terminal and the output terminal of the driving device. The voltage regulator receives the first high voltage of the first high-voltage terminal. The voltage regulator steps down the first high voltage to generate a supply voltage. The voltage generator is coupled to a second high-voltage terminal and the output terminal of the driving device. The voltage generator provides a reference voltage for the output terminal of the driving device. The reference voltage is substantially lower than the supply voltage. The first NMOSFET is coupled between the output terminal of the driving device and a low-voltage terminal.

Laser driver designs to reduce or eliminate fault laser firing

Laser driver designs that aim to reduce or eliminate the problem of fault laser firing are disclosed. Various laser driver designs presented herein are based on providing a current dissipation path that is configured to start providing a resistance for dissipating at least a portion, but preferably substantially all, of the negative current from the laser diode. Dissipating at least a portion of the negative current may decrease the unintentional increase of the voltage at the input to the laser diode and, therefore, reduce the likelihood that fault laser firing will occur. A control logic may be used to control the timing of when the current dissipation path is activated (i.e., provides the resistance to dissipate the negative current from the laser diode) and when it is deactivated.

Aging protection techniques for power switches

The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.

LOAD DRIVE DEVICE
20220412281 · 2022-12-29 · ·

A large current flowing when energization by normal load drive control is performed at the time of a load short-circuit is prevented. A load drive device 100 includes drive switches 61 and 62 that turn on or off the current supplied from a power source to a load 70, a switch drive circuit 20 that transmits a drive signal to the drive switches 61 and 62 based on a control command from an arithmetic device 10, and a constant current source 40 that supplies the current to the load 70 without passing through the drive switches 61 and 62. Then, the switch drive circuit 20 performs control so as not to turn on either the drive switches 61 or 62 when the voltage between both ends of the load 70 becomes equal to or less than the determination value in a state where the drive switches 61 and 62 are turned off and in a state where the current is supplied from the constant current source 40 to the load 70.

SWITCH DEVICE
20220399885 · 2022-12-15 ·

A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.