An active clamp switching power converter circuit includes a primary-side sensing circuit that generates a sensed voltage based on an auxiliary winding voltage of an auxiliary winding around the core having a same polarity as the primary winding. Based on the sensed voltage, a controller controls switching of a power switch coupled to the primary winding to control current through the primary winding and controls switching of an active clamp switch to control leakage current when the power switch is turned off. The controller regulates timing of the switching to turn on the power switch based on timing of a zero voltage switching condition for power efficient operation.

A compact solid state relay (7) is provided. Solid state devices (74, 75), such as Triacs or Thyristors are used to implement the relay functionality. The device is at least partially enclosed in a housing that has pins for mounting on an electronics board. A number of U shaped jumpers (72) or other jumpers or wires are provided in the housing to act as heat sinks. A sub-miniature fan (70) is positioned to create an air flow over the heat sinks and dissipate heat from the device.

During a first mode of operation, a zero current detect (ZCD) signal is asserted in response to detecting a zero current condition at a switch node of a power converter. The power converter enters a light load mode of operation when the ZCD signal is asserted between a beginning point and a trigger point of a period of a PWM signal. A compensator voltage is generated based on a feedback voltage indicative of an output voltage. The compensator voltage is compared to a threshold voltage that represents a limit for the compensator voltage during the light load mode of operation determined over a range of the output voltage. The power converter exits the light load mode back to the first mode of operation in response to the compensator voltage being beyond the threshold voltage.

A microcontroller based multifunctional electronic switch uses an external control device design for generating, detecting and converting an external control signal into a message carrying sensing signal interpretable and executable to a microcontroller. Based on a signal format of said message carrying sensing signal received said microcontroller operates to perform at least an on/off switch control mode, a dimming control mode and an illumination level switching control mode. When said signal format of said message carrying sensing signal detected is a short voltage signal, said microcontroller operates to perform said on/off control mode. When said signal format of said message carrying sensing signal detected is a long voltage signal said microcontroller operates to perform said dimming control mode. When said signal format of said message carrying sensing signal detected is a constant voltage signal, said microcontroller operates to perform said illumination level switching control mode.

A gate driver circuit is provided. The gate driver circuit includes an isolated gate driver power supply circuit. The isolated gate driver power supply circuit includes a coreless transformer and a resonance converter coupled to the coreless transformer. A method of manufacturing an isolated gate driver power supply circuit for a gate driver circuit is also provided.

Disclosed is a solid state power controller configured to supply electric power from an AC power supply to at least one load via at least one power distribution channel, the at least one power distribution channel comprising a primary solid state switching device and a secondary solid state solid state switching device connected in series. The solid state power controller includes a primary control terminal driver configured to supply a primary control voltage to the control terminal (G) of the primary solid state switching device with respect to a reference potential (R) and a secondary control terminal driver configured to supply a secondary control voltage to the control terminal (G) of the secondary solid state switching device.

The present document describes a control circuit and a method for controlling a power transistor, wherein the power transistor has a drain, a gate and a source. The power transistor has a body diode. The control circuit is configured to predict a time instant at which a drain potential at the drain falls below a source potential at the source of the power transistor by more than a diode threshold voltage of the body diode. Furthermore, the control circuit is configured to apply a pre-bias potential and/or provide a pre-bias current to the gate of the power transistor in dependence the predicted time instant, such that a conducting channel between the drain and the source is provided, which at least partially takes over current which would otherwise flow through the body diode.

During a first mode of operation, a zero current detect (ZCD) signal is asserted in response to detecting a zero current condition at a switch node of a power converter. The power converter enters a light load mode of operation when the ZCD signal is asserted between a beginning point and a trigger point of a period of a PWM signal. A compensator voltage is generated based on a feedback voltage indicative of an output voltage. The compensator voltage is compared to a threshold voltage that represents a limit for the compensator voltage during the light load mode of operation determined over a range of the output voltage. The power converter exits the light load mode back to the first mode of operation in response to the compensator voltage being beyond the threshold voltage.

A circuit arrangement, signal processor, and method for interleaved switched boundary mode power conversion are disclosed. The circuit arrangement comprises at least an input for receiving an alternating input voltage from a power supply; an output to provide an output voltage to a load; a first interleaved circuit comprising: a first energy storage device; and a first controllable switching device; and one or more secondary interleaved circuits, each comprising: a secondary energy storage device; and a secondary controllable switching device; and a signal processor. The signal processor is connected to the controllable switching devices and comprises at least a first switching cycle controller, configured for cycled zero-current switching operation of the first controllable switching device; and one or more secondary switching cycle controllers, configured for cycled zero-current switching operation of the one or more secondary controllable switching devices The signal processor is configured to disable one or more of the interleaved circuits when the alternating input voltage is lower than a first threshold voltage to reduce the zero-crossing time.

A fully isolated drive circuit to be used for regulating an output voltage across a load. The isolated drive circuit may charge, discharge, or preserve the load charge using a controller that controls one or more switches. The controller may operate a switch according to an internal/external clock or an external control signal received by the controller. The isolated drive circuit may be an effective solution to simplify the drive design and decrease the amount of energy dissipated by the drive, especially when the load, associated with the drive, requires a high input voltage level.