Patent classifications
H03K17/168
Switching device for disconnecting a current path
Various embodiments include a switching device for disconnecting a current path in a DC supply system, said current path comprising inductances at the source end and the load end, the switching device comprising: two series-connected switching modules; wherein each of the series-connected switching modules comprises a controllable semiconductor switching element and a series circuit; the series circuit including a resistor and a capacitor connected in parallel to the controllable semiconductor switching element.
Semiconductor device including a circuit to compensate for parasitic inductance
A semiconductor device includes a first transistor, a second transistor coupled in parallel with the first transistor, and a first parasitic inductance between an emitter of the first transistor and an emitter of the second transistor. The semiconductor device includes a first circuit configured to provide a first gate driver signal to the first transistor based on a common driver signal and a second circuit configured to provide a second gate driver signal to the second transistor based on the common driver signal. The first circuit and the second circuit are configured to compensate for a voltage drop across the first parasitic inductance such that the first gate driver signal and the second gate driver signal are in phase with and at the same magnitude as the common driver signal.
Gate driving circuit, semiconductor device, and power conversion device
A gate driving circuit of embodiments is provided with a first transistor which controls a gate-on voltage applied to a gate electrode of a switching device, a second transistor which controls a gate-off voltage applied to the gate electrode of the switching device, a driving logic circuit which controls turn-on/turn-off of the first and second transistors, a first power source which supplies the gate-on voltage to the gate electrode when the first transistor is turned on, a second power source which supplies the gate-off voltage to the gate electrode when the second transistor is turned on, a first gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, a second gate resistance variable circuit in which a plurality of field effect transistors is connected in parallel, and a gate resistance control circuit which controls gate voltages of a plurality of field effect transistors.
System and method for a switch transistor driver
In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.
Multi-stage gate turn-off with dynamic timing
A circuit for turning off a power semiconductor switch includes a turn-off transistor coupled to switch a signal for turning off the power semiconductor switch onto a control terminal of the power semiconductor switch and a feedback control loop for controlling a voltage on the control terminal of the power semiconductor switch during turn-off. The feedback loop includes a feedback path to feedback a measurement of the voltage of the control terminal of the power semiconductor switch, a control terminal reference voltage generator to generate a time-dependent reference voltage, an error amplifier to generate an error signal representative of a difference between the voltage of the control terminal and the time-dependent reference voltage, and a forward path to convey the error signal forward for controlling the switching of the signal for turning off the power semiconductor switch onto the control terminal of the power semiconductor switch by the turn-off transistor.
SEMICONDUCTOR DEVICE
There is a problem in related-art semiconductor devices that the chip size of a semiconductor device having an active Miller clamp function cannot be reduced. According to one embodiment, a semiconductor device is configured to, when a power device is turned on or off, monitor a gate voltage Vg of the power device, set a predetermined range within a transition range, the transition range being a range within which the gate voltage Vg changes, change, when the gate voltage Vg is within the predetermined range, the gate voltage Vg of the power device by using a predetermined number of constant-current circuits, and change, when the gate voltage Vg is outside the predetermined range, the gate voltage Vg by using a larger number of constant-current circuits than the number of constant-current circuits that are used when the gate voltage Vg is within the predetermined range.
Apparatus for controlling insulating gate-type semiconductor element, and power conversion apparatus using apparatus for controlling insulating gate-type semiconductor element
An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
INSULATED GATE POWER DEVICE WITH INDEPENDENTLY CONTROLLED SEGMENTS
A design technique is disclosed that divides up a cellular power switch into different size segments. Each segment is driven by a different driver circuit. The selection of the combination of segments is made to minimize the combined conduction and switching losses of the power switch. For example, for very light loads, switching losses dominate so only a small segment is activated for driving the load. For medium and high load currents, conduction losses become more significant, so additional segments are activated to minimize the total losses. In one embodiment, the number of cells in the segments is binary weighted, such as 1×, 2×, and 4×, so that there are seven different combinations of segments. The drivers may be configured to achieve the same or different slew rates of the segments, such as to reduce transients. The segments may all be in the same die or a plurality of dies.
Switching element driving circuit
A switching element driving circuit includes a current detection unit that outputs a driving stop signal based on a level of current flowing through the switching element, and first and second control elements each connected to a control terminal of the switching element. A comparator controls the first control element based on a result of comparison of an output voltage of the driving circuit main unit with a first reference voltage. A differential amplifier drives the second control element in accordance with a voltage difference between the output voltage of the driving circuit main unit and a second reference so as to maintain the output voltage equal to the second reference voltage. An operation stopping unit stops the comparator and the differential amplifier to drive the first and second control elements, respectively, in response to the driving stop signal.
IGBT gate drive circuit and method
There are provided methods and systems for operating insulated gate bipolar transistors (IGBTs). For example, there is provided a method that can include detecting a desaturation condition in an IGBT and initiating a turn off procedure when desaturation is detected. The turn off procedure can include holding a gate of the IGBT at at least one voltage level intermediate between a positive rail voltage and a negative rail voltage of an operational range of the IGBT.