According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

An integrated device includes at least one MOS transistor having a plurality of cells. In each of one or more of the cells a disabling structure is provided. The disabling structure is configured to be in a non-conductive condition when the MOS transistor is switched on in response to a control voltage comprised between a threshold voltage of the MOS transistor and an intervention voltage of the disabling structure, or to be in a conductive condition otherwise. A system comprising at least one integrated device as above is also proposed. Moreover, a corresponding process for manufacturing this integrated device is proposed.

A power distribution circuit can include a comparator circuit that is formed of an inverter. The inverter can be configured with a trip voltage value (Vtrip) different than half a supply voltage value (VDD/2) for further energy efficiencies in discharging a charge storage device used in the power distribution circuit to gain security.

A transistor circuit having a dummy capacitor or a dummy transistor between an input terminal and a transistor is disclosed. The circuit improves secondary nonlinear characteristics of the transistor attributable to one or more parasitic components and a clock signal. The transistor circuit includes an input terminal configured to receive an input signal, a transistor having a gate configured to receive a clock signal, and a source connected to the input terminal, a connection line between the input terminal and the transistor and having a parasitic resistor therein, a parasitic capacitor between the input terminal and the transistor, and a dummy transistor having a first terminal that is connected to the connection line between the input terminal and the transistor.

A DC-to-DC transformer converts power from an input source to a load using a fixed voltage transformation ratio. The density of point of load power conversion may be increased and the associated power dissipation reduced by removing the input driver circuitry from the point of load where it is not necessary. An output circuit may be located at the point of load providing fault tolerant rectification of the AC power from the secondary winding of a power transformer which may be located nearby the output circuit. The driver circuit may drive a plurality of transformer-output circuit pairs. The transformer and output circuit may be combined in a single module at the point of load. Alternatively, the output circuit may be integrated into point of load circuitry such as a processor core. The transformer may be deployed near the output circuit.

A semiconductor module includes: a semiconductor substrate; a switching element having a first electrode, a second electrode, and a gate electrode, and the switching element configured to perform turning on/off between the first electrode and the second electrode in response to applying of a predetermined gate voltage to the gate electrode; a control circuit part configured to control the gate voltage; and a current detection element configured to detect a current which flows between the first electrode and the second electrode of the switching element, wherein the switching element, the control circuit part, and the current detection element are mounted on the semiconductor substrate, and the current detection element is formed of a Rogowski coil.

A power module includes a switching element, a temperature detection part which detects an operation temperature T of the switching element, a control electrode voltage control part which controls a control electrode voltage based on a threshold voltage Vth during an operation of the switching element which is calculated based on information including the operation temperature T of the switching element detected by the temperature detection part, and a switching speed control part which controls a switching speed of the switching element based on the operation temperature T of the switching element detected by the temperature detection part.

A circuit can comprise a transistor, a sensor, and a switch. The transistor can include a drain electrode, a gate electrode, a source electrode, and a back electrode. The sensor can be configured to detect an error condition in the transistor. The switch can be configured to change a voltage at the back electrode in response to the sensor detecting the error condition in the transistor, the change of the voltage at the back electrode reducing current flow between the drain electrode and the source electrode.

The present description concerns a method of controlling a bidirectional switch (200), including: first (210 1) and (210 2) field-effect transistors electrically in series between first (262 1) and second (262 2) terminals of the bidirectional switch; third (614) and fourth (612) field-effect transistors electrically in series between said first and second terminals of the bidirectional switch, a first connection node (252) in series with the first and second transistors being common with a second connection node (616) in series with the third and fourth transistors, including steps of: receiving a voltage (V200) between the terminals of the bidirectional switch; detecting, from the received voltage, a first sign of said voltage; at least while the first sign is being detected, coupling the first terminal to said first node (252), potentials of control terminals of the first, second, third, and fourth transistors being referenced to the potential (REF) of the first and second nodes having common sources of the first, second, third, and fourth transistors connected thereto.

An integrated circuit that may be employed as a smart switch. The integrated circuit includes a first part of a semiconductor switch coupled between a supply node and an output node and configured to provide a first current path in accordance with a first drive signal. The integrated circuit further includes a second part of the semiconductor switch coupled between the supply node and the output node and configured to provide a second current path in accordance with a second drive signal. The integrated circuit includes a drive circuit configured to generate, in response to a switch-on command, the first drive signal and the second drive signal such that the first part of the semiconductor switch and the second part of the semiconductor switch are alternatingly switched on and off. During an overlap period, both the first and the second part of the semiconductor switch are in an on-state.