Patent classifications
H03K17/92
A Superconducting Switch
The invention relates to a superconducting electrical switch. The switch comprises two parallel branches of superconducting material in a loop, and a magnetic field generator which generates a time-varying magnetic field through the loop in a direction generally parallel to the axis of the loop. The magnetic field generator is selectively activated and de-activated to switch the electrical switch between a low-resistance state and a higher-resistance state. In the low-resistance state, there is no magnetic field through the loop and transport current flows through the loop. In the higher-resistance state, a magnetic field through the loop induces a screening current such that the sum of the transport current and the screening current is substantially equal to the critical current or is greater than the critical current of the superconducting material. The switch may be used in, for example, a rectifier or fault current limiter.
QUANTUM COMPUTING DEVICE AND METHOD OF MITIGATING DETECTION CROSSTALK
A quantum computing device performs quantum pre-processing on a plurality of qubits, performs measurements on the plurality of qubits on which the quantum pre-processing is performed, and performing classical post-processing on a measurement outcome of the plurality of qubits to mitigate a detection crosstalk included in the measurement outcome.
QUANTUM COMPUTING DEVICE AND METHOD OF MITIGATING DETECTION CROSSTALK
A quantum computing device performs quantum pre-processing on a plurality of qubits, performs measurements on the plurality of qubits on which the quantum pre-processing is performed, and performing classical post-processing on a measurement outcome of the plurality of qubits to mitigate a detection crosstalk included in the measurement outcome.
TOPOLOGICALLY PROTECTED QUANTUM CIRCUIT WITH SUPERCONDUCTING QUBITS
There is described herein a topologically protected quantum circuit with superconducting qubits and method of operation thereof. The circuit comprises a plurality of physical superconducting qubits and a plurality of coupling devices interleaved between pairs of the physical superconducting qubits. The coupling devices comprise at least one φ-Josephson junction, wherein a Josephson phase φ.sub.0 of the φ-Josephson junction is non-zero in a ground state, the coupling devices have a Josephson energy E.sub.Jφ, the physical superconducting qubits have a Josephson energy E.sub.Jq, and the circuit operates in a topological regime when
TOPOLOGICALLY PROTECTED QUANTUM CIRCUIT WITH SUPERCONDUCTING QUBITS
There is described herein a topologically protected quantum circuit with superconducting qubits and method of operation thereof. The circuit comprises a plurality of physical superconducting qubits and a plurality of coupling devices interleaved between pairs of the physical superconducting qubits. The coupling devices comprise at least one φ-Josephson junction, wherein a Josephson phase φ.sub.0 of the φ-Josephson junction is non-zero in a ground state, the coupling devices have a Josephson energy E.sub.Jφ, the physical superconducting qubits have a Josephson energy E.sub.Jq, and the circuit operates in a topological regime when
PERSISTENT CURRENT SWITCH AND SUPERCONDUCTING DEVICE
A persistent current switch includes a superconducting wire, a heater, and an insulating member. The superconducting wire includes a substrate and a superconducting layer provided on the substrate. The superconducting layer includes a first principal surface facing the substrate and a second principal surface on an opposite side of the first principal surface. The heater is disposed only on the second principal surface side with respect to the superconducting layer. The insulating member is provided between the second principal surface of the superconducting layer and the heater.
PERSISTENT CURRENT SWITCH AND SUPERCONDUCTING DEVICE
A persistent current switch includes a superconducting wire, a heater, and an insulating member. The superconducting wire includes a substrate and a superconducting layer provided on the substrate. The superconducting layer includes a first principal surface facing the substrate and a second principal surface on an opposite side of the first principal surface. The heater is disposed only on the second principal surface side with respect to the superconducting layer. The insulating member is provided between the second principal surface of the superconducting layer and the heater.
GENERATING ERROR-RESISTANT QUANTUM CONTROL PULSES FROM GEOMETRICAL CURVES
Aspects of generating error-resistant quantum control pulses from geometrical curves are described. In some embodiments, a closed space curve is parameterized for a target gate operation of a quantum computing device. The closed space curve corresponds to an evolution operator of a time-dependent Schrödinger equation associated with the target gate operation. A control field definition is identified for the target gate operation based at least in part on a geometrical analysis of the evolution operator of the time-dependent Schrödinger equation. The target gate operation is implemented for the quantum computing device based on the control field definition.
GENERATING ERROR-RESISTANT QUANTUM CONTROL PULSES FROM GEOMETRICAL CURVES
Aspects of generating error-resistant quantum control pulses from geometrical curves are described. In some embodiments, a closed space curve is parameterized for a target gate operation of a quantum computing device. The closed space curve corresponds to an evolution operator of a time-dependent Schrödinger equation associated with the target gate operation. A control field definition is identified for the target gate operation based at least in part on a geometrical analysis of the evolution operator of the time-dependent Schrödinger equation. The target gate operation is implemented for the quantum computing device based on the control field definition.
PARAMETER CALIBRATION METHOD AND SYSTEM, QUANTUM CHIP CONTROL METHOD
A parameter calibration method is provided. The parameter calibration method includes: obtaining a control parameter to be calibrated; determining a simulation running error corresponding to a quantum chip; determining calibration data corresponding to the control parameter to be calibrated based on the simulation running error; and obtaining a calibrated control parameter by calibrating the control parameter to be calibrated based on the calibration data, wherein the calibrated control parameter is used for controlling operation of the quantum chip.