A buffer output circuit, a driving method thereof and a memory apparatus are provided. The memory apparatus includes a memory array and the buffer output circuit including a first output stage circuit and a second output stage circuit. The first output stage circuit and the second output stage circuit receive the data signal at the same time and are both coupled to the data output terminal outputting a data output signal. The second output stage circuit receives a feedback signal from the first output stage circuit. During a pre-charging-discharging period, the first output stage circuit performs a voltage pre-raising operation or a voltage pre-decreasing operation on the data output signal based on the data signal, and the second output stage circuit keeps the level of the data output signal changing based on the feedback signal until the state transition of the data output signal is completed.