H03K19/14

CONTROLLING LIGHT SOURCE INTENSITIES ON OPTICALLY TRACKABLE OBJECT

Examples are disclosed that relate to dynamically controlling light sources on an optically trackable peripheral device. One disclosed example provides a near-eye display device comprising an image sensor, a communications subsystem, a logic subsystem, and a storage subsystem. The storage subsystem stores instructions executable by the logic subsystem to control a peripheral device comprising a plurality of light sources by receiving image data from the image sensor, identifying in the image data a constellation of light sources formed by a subset of light sources of the peripheral device, and based upon the constellation of light sources identified, send to the peripheral device via the communications subsystem constellation information related to the constellation of light sources identified.

CONTROLLING LIGHT SOURCE INTENSITIES ON OPTICALLY TRACKABLE OBJECT

Examples are disclosed that relate to dynamically controlling light sources on an optically trackable peripheral device. One disclosed example provides a near-eye display device comprising an image sensor, a communications subsystem, a logic subsystem, and a storage subsystem. The storage subsystem stores instructions executable by the logic subsystem to control a peripheral device comprising a plurality of light sources by receiving image data from the image sensor, identifying in the image data a constellation of light sources formed by a subset of light sources of the peripheral device, and based upon the constellation of light sources identified, send to the peripheral device via the communications subsystem constellation information related to the constellation of light sources identified.

Controlling light source intensities on optically trackable object

Examples are disclosed that relate to dynamically controlling light sources on an optically trackable peripheral device. One disclosed example provides a near-eye display device comprising an image sensor, a communications subsystem, a logic subsystem, and a storage subsystem. The storage subsystem stores instructions executable by the logic subsystem to control a peripheral device comprising a plurality of light sources by receiving image data from the image sensor, identifying in the image data a constellation of light sources formed by a subset of light sources of the peripheral device, and based upon the constellation of light sources identified, send to the peripheral device via the communications subsystem constellation information related to the constellation of light sources identified.

Controlling light source intensities on optically trackable object

Examples are disclosed that relate to dynamically controlling light sources on an optically trackable peripheral device. One disclosed example provides a near-eye display device comprising an image sensor, a communications subsystem, a logic subsystem, and a storage subsystem. The storage subsystem stores instructions executable by the logic subsystem to control a peripheral device comprising a plurality of light sources by receiving image data from the image sensor, identifying in the image data a constellation of light sources formed by a subset of light sources of the peripheral device, and based upon the constellation of light sources identified, send to the peripheral device via the communications subsystem constellation information related to the constellation of light sources identified.

GALVANIC ISOLATED DEVICE AND CORRESPONDING SYSTEM
20200252137 · 2020-08-06 ·

A device including an optoelectric circuit that is configured to provide galvanic isolation between a first circuit and a second circuit is disclosed. The optoelectric circuit includes at least one non-inverting buffer and a metal semiconductor diode. The at least one non-inverting buffer is positioned between a collector of a phototransistor and an anode of a light emitting diode. The metal semiconductor diode is positioned between the collector of the phototransistor and the at least one non-inverting buffer.

GALVANIC ISOLATED DEVICE AND CORRESPONDING SYSTEM
20200252137 · 2020-08-06 ·

A device including an optoelectric circuit that is configured to provide galvanic isolation between a first circuit and a second circuit is disclosed. The optoelectric circuit includes at least one non-inverting buffer and a metal semiconductor diode. The at least one non-inverting buffer is positioned between a collector of a phototransistor and an anode of a light emitting diode. The metal semiconductor diode is positioned between the collector of the phototransistor and the at least one non-inverting buffer.

I—V conversion module

An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

I—V conversion module

An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

QUANTUM COMPUTER ARCHITECTURE BASED ON MULTI-QUBIT GATES
20200219001 · 2020-07-09 ·

The disclosure describes various aspects of a practical implementation of multi-qubit gate architecture. A method is described that includes enabling ions in the ion trap having three energy levels, enabling a low-heating rate motional mode (e.g., zig-zag mode) at a ground state of motion with the ions in the ion trap; and performing a Cirac and Zoller (CZ) protocol using the low-heating rate motional mode as a motional state of the CZ protocol and one of the energy levels as an auxiliary state of the CZ protocol, where performing the CZ protocol includes implementing the multi-qubit gate. The method also includes performing one or more algorithms using the multi-qubit gate, including Grover's algorithm, Shor's factoring algorithm, quantum approximation optimization algorithm (QAOA), error correction algorithms, and quantum and Hamiltonian simulations. A corresponding system that supports the implementation of a multi-qubit gate architecture is also described.

QUANTUM COMPUTER ARCHITECTURE BASED ON MULTI-QUBIT GATES
20200219001 · 2020-07-09 ·

The disclosure describes various aspects of a practical implementation of multi-qubit gate architecture. A method is described that includes enabling ions in the ion trap having three energy levels, enabling a low-heating rate motional mode (e.g., zig-zag mode) at a ground state of motion with the ions in the ion trap; and performing a Cirac and Zoller (CZ) protocol using the low-heating rate motional mode as a motional state of the CZ protocol and one of the energy levels as an auxiliary state of the CZ protocol, where performing the CZ protocol includes implementing the multi-qubit gate. The method also includes performing one or more algorithms using the multi-qubit gate, including Grover's algorithm, Shor's factoring algorithm, quantum approximation optimization algorithm (QAOA), error correction algorithms, and quantum and Hamiltonian simulations. A corresponding system that supports the implementation of a multi-qubit gate architecture is also described.