Patent classifications
H03K19/18
Apparatus and method for boosting signal in magnetoelectric spin orbit logic
An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.
Apparatus and method for boosting signal in magnetoelectric spin orbit logic
An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.
Multi-functional spintronic logic gate device
A multi-functional spintronic logic gate device. The device comprises: a magnetic tunnel junction. the magnetic tunnel junction sequentially comprising a reference layer. a tunneling insulation layer, and a free layer from a top layer to a bottom layer, and a separation layer being arranged on at least one side of the two sides of the free layer; a bottom electrode, adjacent to and in contact with the bottom layer of the magnetic tunnel junction and made of a heavy metal material, the periphery of the bottom electrode being coupled to first and second terminals. the first and second terminals being opposite to each other with respect to the bottom electrode, and the bottom electrode being used for receiving a logic input current in a direction pointing to the second terminal along the first terminal; and a top electrode positioned above the reference layer.
TEMPERATURE COMPENSATION OF ANALOG CMOS PHYSICALLY UNCLONABLE FUNCTION FOR YIELD ENHANCEMENT
An apparatus includes a current-based temperature compensation circuit having a reference buffer, a biasing current mirror, and a controller. The reference buffer is configured to receive a biasing reference voltage at a voltage input terminal and replicate the biasing reference voltage to first and second buffer terminals. At least one of the first and second buffer terminals is configured to be electrically connected to at least one gate terminal of an analog complementary metal oxide semiconductor (CMOS) physically unclonable function (PUF) cell. The biasing current mirror is configured to receive a reference current at a current input terminal and replicate the reference current to the first buffer terminal. The controller is configured to compensate an output of the CMOS PUF cell for temperature variation based on a weighted sum of a bandgap current, a current proportional to absolute temperature, and a current complementary to absolute temperature.
FERROELECTRICALLY MODULATED SPIN ORBIT LOGIC DEVICE
A spin orbit logic (SOL) device includes a first electrically conductive layer; a layer comprising a ferroelectric material (FE layer) on the first electrically conductive layer; a second electrically conductive layer on the FE layer; and a spin orbit coupling (SOC) stack including a first layer (SOC1 layer) including a first SOC material, and a second layer (SOC2 layer) including a second SOC material, the SOC1 layer adjacent the FE layer.
Non volatile resistive memory logic device
A resistance switching RAM logic device is presented. The device includes a pair of resistance switching RAM cells that may be independently programed into at least a low resistance state (LRS) or a high resistance state (HRS). The resistance switching RAM logic device may further include a shared output node electrically connected to the pair of resistance switching RAM cells. A logical output may be determined from the programmed resistance state of each of the resistance switching RAM cells.
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in the absence of external magnetic fields
A method of controlling a trajectory of a perpendicular magnetization switching of a ferromagnetic layer using spin-orbit torques in the absence of any external magnetic field includes: injecting a charge current J.sub.e through a heavy-metal thin film disposed adjacent to a ferromagnetic layer to produce spin torques which drive a magnetization M out of an equilibrium state towards an in-plane of a nanomagnet; turning the charge current J.sub.e off after t.sub.e seconds, where an effective field experienced by the magnetization of the ferromagnetic layer H.sub.eff is significantly dominated by and in-plane anisotropy H.sub.kx, and where M passes a hard axis by precessing around the H.sub.eff; and passing the hard axis, where H.sub.eff is dominated by a perpendicular-to-the-plane anisotropy H.sub.kz, and where M is pulled towards the new equilibrium state by precessing and damping around H.sub.eff, completing a magnetization switching.
Switching of perpendicularly magnetized nanomagnets with spin-orbit torques in the absence of external magnetic fields
A method of controlling a trajectory of a perpendicular magnetization switching of a ferromagnetic layer using spin-orbit torques in the absence of any external magnetic field includes: injecting a charge current J.sub.e through a heavy-metal thin film disposed adjacent to a ferromagnetic layer to produce spin torques which drive a magnetization M out of an equilibrium state towards an in-plane of a nanomagnet; turning the charge current J.sub.e off after t.sub.e seconds, where an effective field experienced by the magnetization of the ferromagnetic layer H.sub.eff is significantly dominated by and in-plane anisotropy H.sub.kx, and where M passes a hard axis by precessing around the H.sub.eff; and passing the hard axis, where H.sub.eff is dominated by a perpendicular-to-the-plane anisotropy H.sub.kz, and where M is pulled towards the new equilibrium state by precessing and damping around H.sub.eff, completing a magnetization switching.
CYBER SECURITY THROUGH GENERATIONAL DIFFUSION OF IDENTITIES
Diffusing a root identity of an entity among association and event covenants in a multi-dimensional computing security system involves generating a first generation of diffusion of identities of entities participating in mediated association and generating a second generation of diffusion of identities of the entities through recombinant mediated association of the entities and at least one other entity. The second generation of diffusion of identities facilitates securely constraining a computing system action associated with one of the entities.
Nanomagnetic Multiplier using Dipole Nanomagnetic Structures
A multiplier is formed from a plurality of nanomagnetic structures including slant edge input nanomagnetic structures, diagonal elongate interconnect nanomagnetic structures, and output nanomagnetic structures. Input logic levels are provided by inserting a magnetic field, which generates an set of output magnetic fields representing the product of the binary input values.