Disclosed are a pre-drive module of an analog-to-digital converter and an analog-to-digital conversion device. The pre-drive module includes a sampling capacitor; a controller configured to output a reset control signal, a pre-sampling control signal, and a sampling control signal according to a preset timing sequence; a reset module configured to reset the sampling capacitor upon receiving the reset control signal; a first auxiliary drive circuit configured to amplify an input analog signal and output to the sampling capacitor for sampling upon receiving the sample control signal; and a second auxiliary drive circuit. The controller is configured to output the pre-sampling control signal before outputting the sampling control signal, control the second auxiliary drive circuit to amplify the input analog signal, and output to the sampling capacitor for pre-sampling, and when a charging voltage of the sampling capacitor during pre-sampling reaches a preset voltage value, output the sampling control signal.

A signal processing circuit includes a first sampling capacitor and a second sampling capacitor that are connected for an input signal path of an analog signal, and a signal processor configured to perform predetermined processing on the analog signal sampled by the first sampling capacitor and the analog signal sampled by the second sampling capacitor. The sampling of the analog signal transmitted to one capacitor of the first sampling capacitor and the second sampling capacitor, and the predetermined processing performed by the signal processor on the analog signal sampled by another capacitor of the first sampling capacitor and the second sampling capacitor can be performed in parallel.

A method, which is applied in a driving circuit including an analog-to-digital convertor (ADC) and a switching circuit including an inductor and coupled to a load, includes steps of: performing an analog-to-digital conversion on a load voltage of the load at a first rate; and producing at least a current pulse flowing through the inductor at a second rate. Wherein, each current pulse among the at least a current pulse is accomplished within a second cycle corresponding to the second rate, all of the at least a current pulse are accomplished within a first cycle corresponding to the first rate, and a first length of the first cycle is longer than twice of a second length of the second cycle.

In some embodiments, a circuit includes a first amplifier, a second amplifier, and a counter. The first amplifier operates based on a first power supply voltage and generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array during a first operation period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array during a second operation period. The second amplifier operates based on the first power supply voltage, generates a second output signal based on the first output signal and adjust a voltage level of the second output signal from a low level to a third level. The counter operates based on a second power supply voltage, counts pulses of the second output signal, and outputs a counting result as a digital signal.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.

A signal folding device receives an input signal, and performs frequency modulation on a plurality of first analog signals based on the input signal to obtain a plurality of modulated first analog signals, where a frequency difference between two adjacent first analog signals in the plurality of modulated first analog signals is the same. The signal folding device may filter the plurality of modulated first analog signals based on a specified bandwidth to obtain a second analog signal, and demodulate the second analog signal to obtain an output signal. The output signal is a folded signal of the input signal within a target amplitude, and the second analog signal is an analog signal within the bandwidth.

An apparatus comprises a sigma-delta analog-to-digital converter (ADC) circuit configured to convert an analog input signal to a digital value. The sigma-delta ADC circuit includes a loop filter circuit including at least one loop filter amplifier, a flash ADC circuit including multiple comparators, and a bias control circuit configured to change a biasing of the at least one loop filter amplifier according to outputs of the multiple comparators of the flash ADC circuit.

One or more systems and/or methods for implementing an analog-to-digital converter system with a floating digital channel configuration are provided. An analog input component is configured to receive measured analog signals, and output analog signals, corresponding to the measured analog signals, to an analog channel coupled to the analog input component. The analog channel is coupled to a switching component connected to a first digital channel and a second digital channel. The analog channel comprises a modulator configured to convert the analog signals into a data stream selectively input by the switching component to the first digital channel or the second digital channel.