Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.

Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.

Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.

Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.

A tracking analog-to-digital converter (ADC) for a power converter includes a first tracking loop and a second tracking loop. The first tracking loop is configured to track a voltage input to the tracking ADC using one or more comparators and has a re-clocking circuit to mitigate the impact of comparator output metastability, but introduces multi-cycle latency which increases a residual error of the voltage tracking provided by the first tracking loop. The second tracking loop is configured to supplement the voltage tracking provided by the first tracking loop and to reduce the residual error of the voltage tracking for dynamic changes at the voltage input. The second tracking loop has a single-cycle latency and is implemented with logic that is less sensitive to logic errors due to comparator metastability. Corresponding methods of voltage tracking and an electronic system are also described.

A resolver signal processing apparatus processes a resolver signal output from a resolver by applying an excitation signal generated by an excitation signal generating unit. In particular, the resolver signal processing apparatus includes: a resolver signal processing unit, in which the resolver signal processing unit includes a resolver signal acquiring unit receiving the resolver signal and extracting pole information of the resolver signal, a resolver phase compensating unit compensating a pole acquisition time of extracting the pole information of the resolver signal acquiring unit, and a resolver-digital converter outputting a digital signal by using the pole information extracted from the resolver signal acquiring unit, and a resolver signal processing method using the same.

A system and method for detection of an event and recording data associated with the event. An application-specific integrated circuit (ASIC) for event-driven data acquisition from detector is disclosed. The event-driven circuitry stays silent when there is no event detected on the detector. The event-driven data acquisition system consumes small power and may consume no memory during waiting for an event. Once the event arrives (e.g. photons, particle or ion hits the detector panel), the event is detected and recorded. The ASIC includes multi-channel ADCs (or ADC arrays) with flexible resolution which enables an option to operate at a lower resolution during the silent period to save power.

An apparatus includes a comparator. The comparator includes first and second pregain stages, and a switch network coupled to the first and second pregain stages. A plurality of switches in the switch network are operable to provide a feedback path around at least one of the first and second pregain stages. The comparator further includes a latch coupled to the second pregain stage.

A system and method for fast converging gain calibration for phase lock loops (PLL) are herein disclosed. According to one embodiment, a method includes receiving, with a voltage generation circuit, an input value representing a difference between a sampled voltage and a reference voltage, and adjusting, with the voltage generation circuit, the reference voltage by generating a voltage output based on the difference represented by the input value.

A system and method for fast converging gain calibration for phase lock loops (PLL) are herein disclosed. According to one embodiment, a method includes receiving, with a voltage generation circuit, an input value representing a difference between a sampled voltage and a reference voltage, and adjusting, with the voltage generation circuit, the reference voltage by generating a voltage output based on the difference represented by the input value.