A modulo-based ADC implementation is provided and involves converting an input analog signal into phases of other M periodic analog reference signals based on one or more transfer functions, wherein M?2. The phase of each of the M reference signals comprises a folded signal corresponding to the input analog signal that is amplitude-folded to fall within a required amplitude range. This signal-to-phase conversion allows a modulo operation to be implemented over the input analog signal. Further, the M reference signals are used to obtain M discrete-time digital signals which, in turn, are used to obtain a digital representation of the input analog signal.

A modulo-based ADC implementation is provided and involves converting an input analog signal into phases of other M periodic analog reference signals based on one or more transfer functions, wherein M?2. The phase of each of the M reference signals comprises a folded signal corresponding to the input analog signal that is amplitude-folded to fall within a required amplitude range. This signal-to-phase conversion allows a modulo operation to be implemented over the input analog signal. Further, the M reference signals are used to obtain M discrete-time digital signals which, in turn, are used to obtain a digital representation of the input analog signal.

A system of an interconnected inverter includes an inverter that converts DC power from a DC power supply into AC power and provides AC power to an AC power line, an RDC that converts a voltage value obtained by a voltage sensor into electrical angle information that shows a phase angle of an output voltage, the voltage sensor obtaining a voltage value of an output voltage from the inverter to a power grid, and an ECU that controls the inverter to provide an alternating current in synchronization with an alternating current that flows through the AC power line by using timing at which an angle shown in the electrical angle information given from the RDC attains to a prescribed angle. Extra cost for diversion can be reduced.

An analog converter for a motor angle sensor is described. The analog converter for a motor angle sensor includes Gilbert Cells configured to receive a signal from a motor angle sensor, an intermediate frequency signal source configured to provide an excitation signal to the Gilbert Cells, a low-pass filter configured to receive an output from the Gilbert Cells, a Scott transformer to convert a three-phase waveform into a two-phase waveform, and output a converted signal to an electronic controller.

In a semiconductor device, a sine wave signal is input to a first input part and a cosine wave signal is input to a second input part. A multiplexer alternately selects one of the sine wave signal and the cosine wave signal. An analog to digital converter converts the output signal of the multiplexer into a digital value. A switching circuit is coupled between at least one of the first and second input parts and the multiplexer. The switching circuit is configured to be able to invert the input sine wave signal or the input cosine wave signal, in order to reduce the angle detection error due to the non-linearity error of the A/D converter.

A digital signal processing system to determine a position of a resolver includes a digital signal processor that includes first timer and second timer. The first timer creates a resolver excitation signal from a series of samples and creates an incrementing Crossing signal each time the resolver excitation signal crosses zero. When the Crossing signal has a first value, a multiplexer provides resolver sine signals to an analog to digital converter to convert the resolver sine signal to a series of digital sine samples, and the second timer stores the series of digital sine samples in a sine sample buffer. When the Crossing signal has a second value, the multiplexer provides the resolver cosine signal to the analog to digital converter to convert the resolver cosine signal to a series of digital cosine samples, and the second timer stores the series of digital cosine samples in a buffer.

In a semiconductor device, a sine wave signal is input to a first input part and a cosine wave signal is input to a second input part. A multiplexer alternately selects one of the sine wave signal and the cosine wave signal. An analog to digital converter converts the output signal of the multiplexer into a digital value. A switching circuit is coupled between at least one of the first and second input parts and the multiplexer. The switching circuit is configured to be able to invert the input sine wave signal or the input cosine wave signal, in order to reduce the angle detection error due to the non-linearity error of the A/D converter.

An analog signal is accurately converted into a digital signal. An oscillator generates an oscillation signal having a cycle that depends on a signal level of an input analog signal. A current bit generation unit generates, as a current bit, a bit indicating a value of the oscillation signal at each of a plurality of timings within the cycle. A delay unit delays each current bit over a predetermined period and supplies the delayed current bit as a delayed bit. A determination unit determines whether a change amount of a phase of the oscillation signal changed within the predetermined period is greater than a half cycle of the cycle. An output unit generates and outputs data indicating a period in which respective values of the current bit and the delayed bit form a specific combination when the change amount is not greater than the half cycle, and generates and outputs data indicating a period in which the respective values of the current bit and the delayed bit are the same or form the specific combination when the change amount is greater than the half cycle.

An analog to digital converter is provided. The analog to digital converter includes: an arithmetic operator combining an analog input signal with a feedback signal; a loop filter filtering an output signal of the arithmetic operator; a quantizer quantizing an output signal of the loop filter to output a digital signal; and a feedback converting the digital signal to output a feedback signal, in which the quantizer includes: a plurality of VCOs each receiving a positive output signal and a negative output signal of the loop filter and outputting VCO signals; a plurality of samplers receiving the VCO signals output from the plurality of VCOs, respectively and outputting sampled signals; and a phase detector detecting a phase difference in the sampled signals output from the plurality of samplers, respectively, to detect a phase difference in two VCO signals output from the plurality of VCOs, respectively.

A method and apparatus of processing a voice call are disclosed. One example method of operation may include recording at least a portion of a conference call and storing the portion of the conference call in memory. The method may also include processing the portion of the conference call to identify at least one segment of interest and processing the at least one segment of interest and creating at least one tag of interest to be associated with a third party application. The method may also include forwarding the at least one tag of interest to a third party computing device responsive to the identified segment of interest.