An implantable pulse generator (IPG) is disclosed having an improved ability to steer anodic and cathodic currents between the IPG's electrodes. Each electrode node has at least one PDAC/NDAC pair to source/sink or sink/source a stimulation current to an associated electrode node. Each PDAC and NDAC receives a current with a magnitude indicative of a total anodic and cathodic current, and data indicative of a percentage of that total that each PDAC and NDAC will produce in the patient's tissue at any given time, which activates a number of branches in each PDAC or NDAC. Each PDAC and NDAC may also receive one or more resolution control signals specifying an increment by which the stimulation current may be adjusted at each electrode. The current received by each PDAC and NDAC is generated by a master DAC, and is preferably distributed to the PDACs and NDACs by distribution circuitry.

An implantable pulse generator (IPG) is disclosed having an improved ability to steer anodic and cathodic currents between the IPG's electrodes. Each electrode node has at least one PDAC/NDAC pair to source/sink or sink/source a stimulation current to an associated electrode node. Each PDAC and NDAC receives a current with a magnitude indicative of a total anodic and cathodic current, and data indicative of a percentage of that total that each PDAC and NDAC will produce in the patient's tissue at any given time, which activates a number of branches in each PDAC or NDAC. Each PDAC and NDAC may also receive one or more resolution control signals specifying an increment by which the stimulation current may be adjusted at each electrode. The current received by each PDAC and NDAC is generated by a master DAC, and is preferably distributed to the PDACs and NDACs by distribution circuitry.

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.

An interventional control method based on a computer control system. An interventional control system is designed on the basis of an original computer control system; the analog-to-digital conversion unit of the interventional control system receives a signal from the data acquisition module of the original computer control system and said signal is processed by a control processing unit according to a built-in program; then a digital-to-analog conversion unit performs digital-to-analog conversion on the signal output by the control processing unit and then outputs a signal obtained after the digital-to-analog conversion to the analog-to-digital conversion unit of the original computer control system. According to the interventional computer control system, on the basis of an original computer control system, the analog-to-digital conversion unit of the interventional control system receives a signal output from the data acquisition module of the original computer control system and control processing is performed on said output signal; then the digital-to-analog conversion unit of the interventional control system outputs a signal to the analog-to-digital conversion unit of the original computer control system. The function upgrade of an original computer control system is implemented without changing the operating program of the original computer control system.

An interventional control method based on a computer control system. An interventional control system is designed on the basis of an original computer control system; the analog-to-digital conversion unit of the interventional control system receives a signal from the data acquisition module of the original computer control system and said signal is processed by a control processing unit according to a built-in program; then a digital-to-analog conversion unit performs digital-to-analog conversion on the signal output by the control processing unit and then outputs a signal obtained after the digital-to-analog conversion to the analog-to-digital conversion unit of the original computer control system. According to the interventional computer control system, on the basis of an original computer control system, the analog-to-digital conversion unit of the interventional control system receives a signal output from the data acquisition module of the original computer control system and control processing is performed on said output signal; then the digital-to-analog conversion unit of the interventional control system outputs a signal to the analog-to-digital conversion unit of the original computer control system. The function upgrade of an original computer control system is implemented without changing the operating program of the original computer control system.

SAR-DAC devices and operation methods of SAR-DAC devices are provided. An exemplary SAR-DAC device includes a comparator having a positive input terminal and a negative input terminal; and a DAC core unit including a first capacitor, a second capacitor, and a current-controlled discharging structure. The first capacitor includes a first charging-discharging terminal. The second capacitor includes a second charging-discharging terminal. The current-controlled discharging structure includes current beam circuit units. Each current beam circuit unit includes a first discharging input terminal connected to the first charging-discharging terminal and a second discharging input terminal connected to the second charging-discharging terminal. The current-controlled discharging structure is configured to discharge the first capacitor through the first discharging input terminal by using at least some of the current beam circuit units; and to discharge the second capacitor through the second discharging input terminal using at least some of the current beam circuit units.

SAR-DAC devices and operation methods of SAR-DAC devices are provided. An exemplary SAR-DAC device includes a comparator having a positive input terminal and a negative input terminal; and a DAC core unit including a first capacitor, a second capacitor, and a current-controlled discharging structure. The first capacitor includes a first charging-discharging terminal. The second capacitor includes a second charging-discharging terminal. The current-controlled discharging structure includes current beam circuit units. Each current beam circuit unit includes a first discharging input terminal connected to the first charging-discharging terminal and a second discharging input terminal connected to the second charging-discharging terminal. The current-controlled discharging structure is configured to discharge the first capacitor through the first discharging input terminal by using at least some of the current beam circuit units; and to discharge the second capacitor through the second discharging input terminal using at least some of the current beam circuit units.

A phase rotator receives control signals and thermometer coded signals that specifies the phase of an output signal. The phase rotator may be used, for example, by a clock and data recovery (CDR) circuit to continually rotate the phase of a clock to compensate for phase/frequency mismatches between received data and the clock. The control signals determine the phase quadrant (i.e., 0-90, 90-180, etc.) of the output signal. The thermometer coded signals determine the phase of the output signal within a quadrant by steering a set of bias currents between two or more nodes. The set of bias currents are selected to reduce the non-linearity between the thermometer coded value and the phase of the output signal.

This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.