A parallel-to-serial conversion circuit may include first to fourth data lines; first to fourth parallel-to-serial converters configured to parallel-to-serial convert data of corresponding two data lines, among the first to fourth data lines, at a ratio of 2:1, respectively; and first to fourth drivers configured to transmit converted data of corresponding parallel-to-serial converter, among the first to fourth parallel-to-serial converters, respectively, to an output line, wherein two of the first to fourth drivers are simultaneously activated.

The least-significant-bits (LSBs) of a first data word of a first subset of a first plurality of data words may be compared to the LSBs of each data word of a second subset of a second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.

The least-significant-bits (LSBs) of a first data word of a first subset of a first plurality of data words may be compared to the LSBs of each data word of a second subset of a second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.

Embodiments of the present disclosure relate to operations including obtaining a binary source data set and determining a decimal value that represents the source data set. In addition, the operations include determining a Kinetic Data Primer (KDP) that represents the decimal value. The KDP may include a mathematical expression that represents the decimal value. Further, the operations may include storing the KDP as a compressed version of the source data set.

Embodiments of the present disclosure relate to operations including obtaining a binary source data set and determining a decimal value that represents the source data set. In addition, the operations include determining a Kinetic Data Primer (KDP) that represents the decimal value. The KDP may include a mathematical expression that represents the decimal value. Further, the operations may include storing the KDP as a compressed version of the source data set.

An encoding system may be provided. The encoding system may comprise a first stage and a second stage. The first stage may be configured to receive a first input, decode the first input, and produce a first output comprising the decoded first input. The second stage may be configured to receive a second input, receive the first output from the first stage, and convert the first input and the second input from a first coding system to a second coding system based on the second input and the first output. The second stage may produce a second output comprising the converted first input and the converted second input.

The least-significant-bits (LSBs) of a first data word of a first subset of a first plurality of data words may be compared to the LSBs of each data word of a second subset of a second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.

The least-significant-bits (LSBs) of a first data word of a first subset of a first plurality of data words may be compared to the LSBs of each data word of a second subset of a second plurality of data words. The first data word may then be mapped to a second data word of the second subset. A number of LSBs of the second data word matching LSBs of the first data word may be greater than a respective number of LSBs of each data word of a third subset of the second subset matching the LSBs of the first data word, where the third subset excludes the second data word and a most-significant-bit (MSB) of the second data word may be the same as a MSB of the first data word.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for encoding binary data are provided. One of the methods includes: obtaining a multimedia file from a storage device, extracting multiple bytes of binary data from the multimedia file, converting the binary data into 7-bit encoded data using an encoding algorithm, and sending one or more signals comprising the 7-bit encoded data to a remote computing device. The converting includes identifying multiple bits of data, each corresponding to a predetermined bit position of one of the bytes of binary data, generating one or more bytes of combined-bit data by combining the identified bits of data, generating one or more bytes of remaining-bit data, and generating the 7-bit encoded data by concatenating the one or more bytes of combined-bit data and the one or more bytes of remaining-bit data.

A circuit for mapping N coordinates to a 1D space receives N input bit-strings representing respective coordinates, which can be of different sizes; produces a grouped bit-string therefrom, in which the bits, including non-data bits, are grouped into groups of bits originating from the same bit position per group; and demultiplexes this into n=1 . . . N demultiplexed bit-strings, and sends each to a respective n-coordinate channel. The nth demultiplexed bit-string includes a respective part of the grouped bit-string that has n coordinate data bits and N-n non-data bits per group, and all other groups filled with null bits. Each but the N-coordinate channel includes bit-packing circuitry which packs down the respective demultiplexed bit-string by removing the no-data bits, and removing the same number of bits per group from the null bit. The packed bit-strings are then aligned relative to one another according to the corresponding bit positions, and combined.