The present invention provide a system and method for generating a catalogue of graphs that acts as a source for error correcting codes. A D3 chord index notation is used to describe the graphs. A list of (3, g) Hamiltonian graphs for even girth g is created to satisfy the condition 6 g 16. Each of the lists is infinite and is used for creating LDPC codes of high quality. Furthermore, the embodiments herein generalizes the application scenario for usage of LDPC codes. The embodiments herein utilizes dynamically changing error-correction codes in wireless communication systems.

A method includes generating, by processing circuitry of a communications device, a partitioned complementary sequence based on information bits for transmission. The partitioned complementary sequence may include zero-valued elements. The method may include encoding a plurality of symbols on a plurality of orthogonal subcarriers using the partitioned complementary sequence. The encoding may include mapping additional information bits on subcarriers associated with the zero-valued elements of the partitioned complementary sequence. Additionally, the method may include controlling a radio of the communications device to transmit the plurality of symbols on the plurality of orthogonal subcarriers via an antenna of the communications device.

Systems, apparatuses, and methods for generating error correction codes (ECCs) with two check symbols are disclosed. In one embodiment, a system receives a data word of length N2 symbols, wherein N is a positive integer greater than 2, wherein each symbol has m bits, and wherein m is positive integer. The system generates a code word of length N symbols from the data word in accordance with a linear code defined by a parity check matrix. The parity check matrix is generated based on powers of , wherein is equal to raised to the (2.sup.m/41) power, is equal to a raised to the (2.sup.m/2+1) power, and is a primitive element of GF(2.sup.m). In another embodiment, the system receives a (N, N2) code word and decodes the code word by generating a syndrome S from the code word using the parity check matrix.

Concepts and schemes pertaining to quasi-cyclic-low-density parity-check (QC-LDPC) coding are described. A processor of an apparatus may generate a QC-LDPC code having a plurality of codebooks embedded therein. The processor may select a codebook from the plurality of codebooks. The processor may also encode data using the selected codebook. Alternatively or additionally, the processor may generate the QC-LDPC code including at least one quasi-row orthogonal layer. Alternatively or additionally, the processor may generate the QC-LDPC code including a base matrix a portion of which forming a kernel matrix that corresponds to a code rate of at least a threshold value

Disclosed is a GEL codeword structure encoding method. The method includes: first transforming an H.sub.C of a code B into an H.sup.B; obtaining a parity bit of the code B by performing an operation on the H.sup.B and an information bit of the code B; using the parity bit to perform RS coding on a code A, to obtain a parity bit of the code A; then obtaining a check code of a GEL code by performing an operation on the parity bits of the code B and the code A; and finally adding a single bit parity check bit, where the code A is defined in a finite field GF (2.sup.l1), the code B is defined in a finite field GF (2.sup.l2), and 1.sub.1 and 1.sub.2 are positive integers. A success rate of decoding the code A in the first row can be improved using this method.

An encoding method of generating an encoded sequence by performing encoding of a given encoding rate based on a predetermined parity check matrix. The predetermined matrix is either a first parity check matrix or a second parity check matrix. The first parity check matrix corresponds to a low density parity check (LDPC) convolutional code that uses a plurality of parity check polynomials, and the second parity check matrix is generated by performing at least one of row permutation and column permutation on the first parity check matrix. A parity check polynomial satisfying zero of the LDPC convolutional code is expressible by using a specific mathematical expression.

An apparatus for generating a frozen set associated with a polar code of length N and dimension K comprises a processing unit configured to take in input the polar code length N, the dimension K, and a profile of a structure of a block lower triangular affine (BLTA) group. The BLTA group structure is associated with an affine transformation matrix of size n?n and the profile is an ordered set of a plurality of values corresponding to block sizes of blocks. The blocks are sub-matrices of the affine transformation matrix with all the diagonals of blocks in the same order as the ordered block sizes, forming the diagonal of the affine transformation matrix, each of the block sizes is such that n is equal to the sum of block sizes and n is equal to log.sub.2(N). The processing unit generates the frozen set.

The disclosure relates to devices and methods implementing polar codes. For instance, the disclosure relates to an an encoder for encoding data, wherein the encoder comprises a processor configured to encode the data using a (n, k, d) parent polar code C into codewords c.sub.0.sup.n-1=u.sub.0.sup.n-1A subject to the constraints u.sub.0.sup.n-1V.sup.T=0, wherein u.sub.0.sup.n-1 denotes the data, wherein

[00001]$A={\left(\begin{array}{cc}1& 0\\ 1& 1\end{array}\right)}^{.Math.m},$

wherein F.sup..Math.m denotes the m-times Kronecker product of the matrix F with itself and wherein the constraint matrix V comprises in addition to the constraint matrix V.sub.0 of the parent polar code the constraint matrix V.sub.1 of a first helper code C.sub.1 and the constraint matrix V.sub.2 of a second helper code C.sub.2.

A construction method for a (n,n(n1),n1) permutation group code based on coset partition is provided. The presented (n,n(n1),n1) permutation group code has an error-correcting capability of d1 and features a strong anti-interference capability for channel interferences comprising multi-frequency interferences and signal fading. As n is a prime, for a permutation code family with a minimum distance of n1 and a code set size of n(n1), the invention provides a method of calculating n1 orbit leader permutation codewords by O.sub.n={o.sub.1}.sub.=1.sup.n1(mod n) and enumerating residual codewords of the code set by P.sub.n=C.sub.nO.sub.n={(l.sub.1).sup.n1O.sub.n}={(r.sub.n).sup.n1O.sub.n)}. Besides, a generator of the code set thereof is provided. The (n,n(n1),n1) permutation group code of the invention is an algebraic-structured code, n1 codewords of the orbit leader array can be obtained simply by adder and (mod n) calculator rather than multiplication of positive integers. Composition operations of the cyclic subgroup C.sub.n acting on all permutations o.sub. of the orbit leader permutation array O.sub.n are replaced by well-defined cyclic shift composite operation functions (l.sub.1).sup.n1 and (r.sub.n).sup.n1 so that the action of the cyclic group acting on permutations is realized by a group of cyclic shift registers.

In an illustrative example, a data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes an erasure correcting code engine configured to generate first erasure recovery data and temporary erasure recovery data in a volatile memory at least partially based on first data to be written to the non-volatile memory. The first erasure recovery data is configured to enable a first type of data recovery of the first data, and the temporary erasure recovery data is configured to enable a second type of data recovery of the first data. The controller is further configured to store the first erasure recovery data and the temporary erasure recovery data in the volatile memory and, after verifying that the first data is stored in the non-volatile memory, to discard or modify the temporary erasure recovery data.