Provided is an optical transmission device including: a symbol demapping unit; a likelihood generation circuit configured to generate likelihoods relating to the reception signal; and an error correction decoding unit configured to execute soft decision decoding. The likelihood generation circuit includes: a first one-dimensional-modulation lookup table configured to input the signal of the I-axis component as an argument to output a first likelihood; a second one-dimensional-modulation lookup table configured to input the signal of the Q-axis component as an argument to output a second likelihood; and a two-dimensional-modulation lookup table configured to input, as an argument, the signal being the concatenation of the signal of the I-axis component and the signal of the Q-axis component, to generate a third likelihood. The error correction decoding unit is configured to execute the soft decision decoding based on the first likelihood, the second likelihood, and the third likelihood.

Provided is an optical transmission device including: a symbol demapping unit; a likelihood generation circuit configured to generate likelihoods relating to the reception signal; and an error correction decoding unit configured to execute soft decision decoding. The likelihood generation circuit includes: a first one-dimensional-modulation lookup table configured to input the signal of the I-axis component as an argument to output a first likelihood; a second one-dimensional-modulation lookup table configured to input the signal of the Q-axis component as an argument to output a second likelihood; and a two-dimensional-modulation lookup table configured to input, as an argument, the signal being the concatenation of the signal of the I-axis component and the signal of the Q-axis component, to generate a third likelihood. The error correction decoding unit is configured to execute the soft decision decoding based on the first likelihood, the second likelihood, and the third likelihood.

A computer-implemented method for error-correction-encoding and encrypting of a file is provided. The file is split into at least two blocks. The first block is encrypted using a given encryption key. The encrypted first block is encoded twice using a first and second forward error correction code of the first block. Each subsequent block is encrypted by performing an algebraic operation. The encrypted block is encoded twice using a first and second forward error correction code for this block, wherein a cryptographic indexing function provides a set of indices used by the second forward error correction code to produce the second encoded chunk. The first encoded chunks of each encrypted block are outputted. The computer-implemented method enables secure transmission of a file content between low power devices.

A decoder performs: computing (S501) a value (i,j) of a performance-improvement metric for each kernel K.sub.i,j; and sorting (S502) the kernels in a list in decreasing order of the values (i,j). The decoder then performs a beliefs propagation iterative process as follows: updating (S503) output beliefs for the W top kernels of the list , and propagating said output beliefs as input beliefs of the neighbour kernels of said W top kernels; updating (S504) output beliefs for each neighbour kernel of said W top kernels following update of their input beliefs, and re-computing (S505) the performance-improvement metric value (i,j) for each said neighbour kernel; setting (S505) the performance-improvement metric for said W top kernels to a null value; and re-ordering (S506) the kernels in the list . Then, the decoder repeats the beliefs propagation iterative process until a stop condition is met.

A decoder performs: computing (S501) a value (i,j) of a performance-improvement metric for each kernel K.sub.i,j; and sorting (S502) the kernels in a list in decreasing order of the values (i,j). The decoder then performs a beliefs propagation iterative process as follows: updating (S503) output beliefs for the W top kernels of the list , and propagating said output beliefs as input beliefs of the neighbour kernels of said W top kernels; updating (S504) output beliefs for each neighbour kernel of said W top kernels following update of their input beliefs, and re-computing (S505) the performance-improvement metric value (i,j) for each said neighbour kernel; setting (S505) the performance-improvement metric for said W top kernels to a null value; and re-ordering (S506) the kernels in the list . Then, the decoder repeats the beliefs propagation iterative process until a stop condition is met.

A method of decoding polar codes based on belief propagation includes conventional belief propagation to decode the polar codes first; when a number of iterations exceeds a predefined upper limit and a cyclic redundancy check fails, the method selects log-likelihood ratio vectors of a plurality of R or L messages from a plurality of log-likelihood ratio vectors generated in each of the iterations and generates another set of log-likelihood ratio vectors (referred to as candidate vector group) to be used as initial values of the R or L messages for a subsequent belief propagation to perform belief propagation decoding iterations and cyclic redundancy check again. Whenever a decoding result passes the cyclic redundancy check, the method exits; otherwise, the method iterates the above procedure until a maximum number of candidate vector groups has been reached.

A hardware complexity reduction method for successive cancellation list decoders (SCL) is provided. In path pruning stages of an SCL decoding, L paths with smallest path metrics out of 2L candidate paths are chosen as surviving candidate paths as in a conventional SCL algorithm. Moreover, path indexes of L surviving candidate paths are provided in a sorted manner according to indexes at an output of a sorter module. After a path pruning, instead of L-to-1 multiplexers, (L/2+1)-to-1 multiplexers are deployed to perform copying operations of any required elements stored in dedicated registers of the L surviving candidate paths.

A hardware complexity reduction method for successive cancellation list decoders (SCL) is provided. In path pruning stages of an SCL decoding, L paths with smallest path metrics out of 2L candidate paths are chosen as surviving candidate paths as in a conventional SCL algorithm. Moreover, path indexes of L surviving candidate paths are provided in a sorted manner according to indexes at an output of a sorter module. After a path pruning, instead of L-to-1 multiplexers, (L/2+1)-to-1 multiplexers are deployed to perform copying operations of any required elements stored in dedicated registers of the L surviving candidate paths.

A Bluetooth receiver is provided. The Bluetooth receiver comprises interface circuitry configured to receive a receive packet. Further, the Bluetooth receiver comprises physical layer processing circuitry configured to demodulate the receive packet into a bit stream representing a sequence of data symbols. Further, the physical layer configured to determine a number of bits in the bit stream having a highest likelihood of being erroneous as weak-bits and determine locations of the identified weak-bits in the bit stream. The Bluetooth receiver further comprises medium access control layer processing circuitry configured to receive the bit stream and information about the determined locations of the identified weak-bits from the physical layer processing circuitry. Further, the medium access control layer is configured to flip one of the weak-bits and a sequential bit in the bit stream in order to generate a modified bit stream, run a respective cyclic redundancy check on the bit stream and the modified bit stream and compare results of the cyclic redundancy checks on the bit stream and on the modified bit stream.

A controller of a memory system performs a soft decoding without additional reads. The controller applies each of read voltages to cells to obtain a corresponding cell count and corresponding data, stores the obtained data, and processes the stored data. The controller determines a set of parameters, based on (i) the read voltages, (ii) cell counts corresponding to the read voltages and (iii) a non-negative regularization parameter. The controller estimates an optimal read voltage based on the set of parameters, generates log-likelihood ratio (LLR) values using the processed data and the optimal read voltage and performs soft decoding using the LLR values.