A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).

.[.A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[H.sub.d|H.sub.p], H.sub.d is the data portion, and H.sub.p is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing..]. .Iadd.System and method for operating a wireless device to encode data using low-density parity-check (LDPC) encoding is discussed. One example method includes: computing a number of modulated orthogonal frequency-division multiplexing (OFDM) symbols for transmitting the data; computing a number of shortening bits; distributing the number of shortening bits over the at least one LDPC codeword; computing a number of puncturing bits for the at least one LDPC codeword; distributing the number of puncturing bits over the at least one LDPC codeword; determining a criterion using at least one of the number of shortening bits and the number of puncturing bits; if the criterion is met, increasing the number of modulated OFDM symbols and recalculating the number of puncturing bits; generating the encoded data using the number of shortening bits, the number of puncturing bits, and the at least one LDPC codeword; and transmitting the encoded data..Iaddend.

The present technology relates to a data processing device and a data processing method capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code having a code length N of 64800 bits and a coding rate r of 9/15, 11/15, or 13/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of LDPC codes after the group-wise interleave is returned to an original sequence. The present technology, for example, can be applied to a case where data transmission using an LDPC code or the like is performed.

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder which encodes input bits including outer encoded bits to generate an LDPC codeword including the input bits and parity bits to be transmitted to a receiver in a current frame; a puncturer which punctures a part of the parity bits which is not transmitted in the current frame; and an additional parity generator which selects at least a part of the parity bits to generate additional parity bits transmitted to the receiver in a previous frame of the current frame, wherein a number of the additional parity bits is determined based on a number of the outer encoded bits and a number of the parity bits left after the puncturing.

A method for increasing coding reliability includes generating a generator matrix for an extended polar code including a standard polar code part and an additional frozen part. The standard polar code part has N bit-channels, including K information bit-channels and N−K frozen bit-channels. The additional frozen part has q additional frozen bit-channels. Among the K information bit-channels, q information bit-channels are re-polarized using the q additional frozen bit-channels. The method further includes receiving an input vector including K information bits and N+q−K frozen bits, and transforming, using the generator matrix, the input vector to an output vector including N+q encoded bits. The K information bits are allocated to the K information bit-channels, and the N+q−K frozen bits are allocated to the N−K frozen bit-channels and the q additional frozen bit-channels.

An apparatus for decoding a TPC codeword is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to receive a first set of soft information corresponding to the TPC codeword. The TPC codeword includes at least one codeword corresponding to each of first, second, and third dimensions. The processor is further configured to iteratively perform a first soft decoding procedure on the at least one codeword corresponding to the first dimension to generate a first candidate codeword and upon determining that the first candidate codeword is not a correct codeword, and perform a second decoding procedure on the at least one codeword corresponding to the third dimension to generate a second candidate codeword. The second decoding procedure generates a second set of soft information to be used at a later iteration of the first decoding procedure.

Embodiments of this application provide an information processing method and a coding apparatus. An information bit sequence includes a K-bit information block. The information bit sequence is to be processed into an encoded bit sequence with a target code length M. For a given code rate R, when the length K of the information block is greater than a preset threshold, the information bit sequence is segmented into two or more segments. Each segment is polar encoded into an encoded subsequence. The encoded subsequence has a length that equals to a mother code length Ni, and i=1, 2, . . . , p. Each of the p encoded subsequences is rate matched to obtain a rate-matched encoded subsequence. A rate-matched encoded subsequence i of the p rate-matched encoded subsequences has a code length Mi. The p rate-matched encoded subsequences are concatenated into an encoded bit sequence which has a code length M.

A 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE) is disclosed. The present disclosure relates to a rate compatible low-density parity-check (RC-LDPC) encoding method and device therefor. The encoding method includes using LDPC in a communication system, including the operations of LDPC encoding information bits by a first encoding rate, and performing a concatenated single parity check (SPC) encoding for the encoded bits by at least one second encoding rate lower than the first encoding rate.

In an optical disc apparatus that records and reproduces data onto and from an optical disc in units of predetermined block, an information divider divides the data so as to reduce an amount of the data included in each of blocks when a recording state of the optical disc does not satisfy a predetermined criterion, and reproduces recording data in units of the block by adding sub-information including a value indicating the amount of the data included in each of the blocks. An error-correction encoder circuit encodes the recording data in a first error-correction code format, and a recorder converts encoded recording data into a recording signal, and records the recording signal onto the optical disc. A quality evaluator circuit produces an evaluation value indicating a recording quality based on a result of reproducing the recording signal recorded on the optical disc.

An apparatus for decoding is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to obtain a first codeword comprising one or more information bits and one or more parity bits, obtain a first parameter corresponding to a code rate of the first codeword, and decode the first codeword using a multi-rate decoder to generate a decoded codeword. The multi rate decoder performs a code reconstruction procedure on the first codeword to generate a reconstructed codeword, and decodes the reconstructed codeword. The processor is further configured to output the decoded codeword.