H03M13/6343

DEEP NEURAL NETWORK A POSTERIORI PROBABILITY DETECTORS AND MEDIA NOISE PREDICTORS FOR ONE-AND TWO-DIMENSIONAL MAGNETIC RECORDING

A deep neural network (DNN) media noise predictor configured for one-dimensional-magnetic (1DMR) recording or two-dimensional-magnetic (TDMR) is introduced. Such architectures are often combined with a trellis-based intersymbol interference (ISI) detection component in a turbo architecture to avoid the state explosion problem by separating the inter-symbol interference (ISI) detection and media noise estimation into two separate detectors and uses the turbo-principle to exchange information between them so as to address the modeling problem by way of training a DNN-based media noise estimators. Thus, beneficial aspects include a reduced bit-error rate (BER), an increased areal density, and a reduction in computational complexity and computational time.

DECODING DEVICE AND DECODING METHOD
20200366319 · 2020-11-19 ·

Deterioration of convergence performance or operational stability due to an increase in constraint length is suppressed when coefficients are updated, so that decoding performance is improved. A decoding device according to the present technology includes an adaptive equalization unit that performs adaptive equalization, an adaptive maximum likelihood decoding unit that causes an identification point of maximum likelihood decoding to adaptively follow a characteristic of an input signal, a target waveform generation unit that, by convoluting a partial response coefficient into a decoded value, generates an equalization target waveform of the adaptive equalization which is performed by the adaptive equalization unit, an error signal generation unit that generates, as an equalization error signal, an error signal between the equalization target waveform and an equalized signal, and a coefficient updating unit that, through least-square-method computation for minimizing a correlation between the decoded value and the equalization error signal, updates the partial response coefficient which is used by the target waveform generation unit to generate the equalization target waveform.

Convolutional code decoder and convolutional code decoding method

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder performs decoding operation according to a received data and an auxiliary data to obtain a target data and includes an error detection data generation circuit, a channel coding circuit, a selection circuit, and a Viterbi decoding circuit. The error detection data generation circuit performs an error detection operation on the auxiliary data to obtain an error detection data. The channel coding circuit, coupled to the error detection data generation circuit, performs channel coding on the auxiliary data and the error detection data to obtain an intermediate data. The selection circuit, coupled to the channel coding circuit, generates a to-be-decoded data according to the received data and the intermediate data. The Viterbi decoding circuit, coupled to the selection circuit, decodes the to-be-decoded data to obtain the target data.

BACKGROUND CALIBRATION OF NON-LINEARITY OF SAMPLERS AND AMPLIFIERS IN ADCS

Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.

Indicating a number of copied information bits in a retransmission
10700710 · 2020-06-30 · ·

Methods, systems, and devices are described for wireless communications. A transmitting device may generate first encoded bits by encoding first information bits using a polar code of a first size, N, and transmit the first encoded bits to a receiving device. After determining the receiving device failed to decode the encoded bits, the transmitting device may generate second encoded bits by encoding the first information bits using a polar code of a second size, 2N. In some cases, the transmitting device may use the first encoded bits and one or more copied information bits to generate the second encoded bits. The transmitting device may transmit the second encoded bits to the receiving device, along with an indication of the number of copied information bits used to generate the second encoded bits. The number of copied information bits may be based on changing channel conditions or transmission parameters.

Background calibration of non-linearity of samplers and amplifiers in ADCs

Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.

Convolutional code decoder and convolutional code decoding method
20200028526 · 2020-01-23 ·

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder performs decoding operation according to a received data and an auxiliary data to obtain a target data and includes an error detection data generation circuit, a channel coding circuit, a selection circuit, and a Viterbi decoding circuit. The error detection data generation circuit performs an error detection operation on the auxiliary data to obtain an error detection data. The channel coding circuit, coupled to the error detection data generation circuit, performs channel coding on the auxiliary data and the error detection data to obtain an intermediate data. The selection circuit, coupled to the channel coding circuit, generates a to-be-decoded data according to the received data and the intermediate data. The Viterbi decoding circuit, coupled to the selection circuit, decodes the to-be-decoded data to obtain the target data.

Receiver circuits performing error correction including identification of a most likely error event based on an enable signal indicative of presence of errors
11916574 · 2024-02-27 · ·

A receiver includes an error correction module. A syndrome value, calculated based on received signals, may be used to enable the error correction module. The error correction module includes an error generator, a Nyquist error estimator, and a decoder. The decoder uses error estimation generated by the Nyquist error estimator to correct the decoded data. There are other embodiments as well.

Signal quality evaluation device, signal quality evaluation value generation method, and reproduction device

To obtain a signal quality evaluation value capable of having a high correlation to an error rate and high accuracy for a reproduction signal of high density recording. For the object, an estimated value of a path selection error rate is obtained on the basis of a distribution of a path metric difference between a maximum likelihood path at each time, which is a detection path in maximum likelihood decoding in a PRML decoding system and a second path having a second highest likelihood. Further, an average error bit number in erroneous detection is obtained from a bit difference number between the maximum likelihood path and the second path at the time of path selection of each time in the maximum likelihood decoding. In addition, an estimated bit error rate is obtained from results and an evaluation value according to the estimated bit error rate is generated.

Partial reverse concatenation for data storage devices using composite codes

In one embodiment, a method includes writing data to a storage medium, via a write channel, by applying a partial reverse concatenated modulation code to the data prior to storing encoded data to the storage medium. The applying the partial reverse concatenated modulation code to the data includes application of a C2 encoding scheme to the data to produce C2-encoded data prior to application of one or more modulation encoding schemes to the C2-encoded data to produce modulated data, followed by application of a C1 encoding scheme to the modulated data subsequent to the application of the one or more modulation encoding schemes to produce the encoded data.