H04L7/041

VEHICULAR CONTROL SYSTEM WITH SYNCHRONIZED COMMUNICATION BETWEEN CONTROL UNITS
20220150854 · 2022-05-12 ·

A vehicular control system includes a first electronic control unit (ECU) and a second ECU disposed at a vehicle. The first and second ECUs are in digital communication with one another via a communication link. The first ECU transmits a first frame to the second ECU, which, responsive to receiving the first frame from the first ECU, transmits a second frame to the first ECU. The first ECU, responsive to receiving the second frame from the second ECU, determines a propagation delay based on an amount of time between when the first ECU transmitted the first frame to the second ECU and when the first ECU received the second frame from the second ECU. The first ECU, responsive to determining the propagation delay, transmits a time synchronization frame to the second ECU that is based at least in part on the determined propagation delay.

METHODS FOR TIME SYNCHRONIZATION AND LOCALIZATION IN A MESH NETWORK

A method includes: scheduling transmission of a first synchronization signal by a first node; and scheduling transmission of a second synchronization signal by a second node. The method also includes, after transmission of the first synchronization signal: receiving, from the first node, a first phase reference associated with the first synchronization signal; and receiving, from the second node, a first phase-of-arrival of the first synchronization signal at the second node. The method additionally includes, after transmission of the second synchronization signal: receiving, from the second node, a second phase reference associated with the second synchronization signal; and receiving, from the first node, a second phase-of-arrival of the second synchronization signal at the first node. The method further includes calculating a propagation delay between the first node and the second node based on the first phase reference, the second phase reference, the first phase-of-arrival, and the second phase-of-arrival.

ERROR-TOLERANT FORWARD ERROR CORRECTION ORDERED SET MESSAGE DECODER
20230299879 · 2023-09-21 ·

Methods are described for identifying and acting upon predetermined message patterns during reception of a data stream structured as USB message frames. A first embodiment performs pattern matching between received message bits and one or more predetermined sequences, identifying unscrambled ordered set messages. A second embodiment applies a descrambling operation and performs comparable pattern matching between descrambled received message bits and one or more additional predetermined sequences, identifying scrambled ordered set messages.

Decision feedback equalization correction of eye scope measurements
11177894 · 2021-11-16 · ·

Methods and systems are described for obtaining a plurality of BER-specific correction values by comparing a first set of BER values obtained by sampling, at a sampling instant near the center of a signaling interval, a non-DFE corrected received signal with a second set of BER values obtained by sampling a DFE-corrected received signal at the sampling instant. A set of eye-scope BER measurements are obtained, each eye-scope BER measurement having a sampling offset relative to the sampling instant, a voltage offset value representing a voltage offset applied to alter a decision threshold, and an eye-scope BER value. A set of DFE-adjusted eye-scope BER measurements are generated by using BER-specific correction values to adjust the voltage offset values of the eye-scope BER measurements.

Communication device, communication method, program, and communication system

Provided is a communication device, including: a transmission and reception unit that transmits and receives a signal with an other communication device; an error detection unit that detects an occurrence of an error by having the transmission and reception unit receive a preamble specifying a type of data to be transmitted next, and comparing a bit sequence of a signal received following the preamble to a bit sequence that should be transmitted for the type specified for transmission by the preamble; and a conflict avoidance unit that, if the occurrence of an error is detected by the error detection unit, instructs the transmission and reception unit to transmit a clock corresponding to a certain number of bits following the preamble, and then transmit an abort signal giving an instruction to terminate communication partway through.

Data transmission framing
11750677 · 2023-09-05 · ·

Techniques for framing data in various data transmission contexts are described. A data framing technique may include a transmitter sending a data stream including repeating bits in alternating forward and reverse order. A receiver of the data stream may fold the data stream, and correlate portions of the folded data stream for purposes of validating the data stream and/or identifying an ID in the data stream. In at least some instances, once the receiver validates the data stream, the receiver may accept payload accompanying the data stream.

APPARATUS AND METHOD FOR GENERATING OR RECEIVING A SYNCHRONIZATION HEADER
20230155809 · 2023-05-18 ·

An apparatus for generating a data stream according to an embodiment is provided. The apparatus is configured to generate the data stream, such that the data stream has header data and payload data. The apparatus is configured to generate the header data such that the header data comprises a synchronization header. Moreover, the apparatus is configured to generate the synchronization header using binary coding. Furthermore, the apparatus is configured to generate the synchronization header such that the synchronization header comprises a synchronization sequence being a predefined bit sequence having a plurality of bits.

CLOCK RECOVERY

Clock recovery from a serial data signal involves using a serializer/deserializer (SERDES) to produce a clock signal which periodically alternates between high and low output clock values. These high and low clock values are generated by outputting for each clock period a series of N digital bits including a plurality of low-level bits to form each low output clock value and a plurality of high-level bits to form each high output clock value. A sync pulse obtained from a sync word present in each frame of the serial data signal is used to periodically determine a frequency error of the clock signal. The frequency error is used as a basis to change a phase of the adjusted clock signal responsive to the frequency error.

Error-tolerant forward error correction ordered set message decoder
11658771 · 2023-05-23 · ·

Methods are described for identifying and acting upon predetermined message patterns during reception of a data stream structured as USB message frames. A first embodiment performs pattern matching between received message bits and one or more predetermined sequences, identifying unscrambled ordered set messages. A second embodiment applies a descrambling operation and performs comparable pattern matching between descrambled received message bits and one or more additional predetermined sequences, identifying scrambled ordered set messages.

Methods for time synchronization and localization in a mesh network

A method includes: scheduling transmission of a first synchronization signal by a first node; and scheduling transmission of a second synchronization signal by a second node. The method also includes, after transmission of the first synchronization signal: receiving, from the first node, a first phase reference associated with the first synchronization signal; and receiving, from the second node, a first phase-of-arrival of the first synchronization signal at the second node. The method additionally includes, after transmission of the second synchronization signal: receiving, from the second node, a second phase reference associated with the second synchronization signal; and receiving, from the first node, a second phase-of-arrival of the second synchronization signal at the first node. The method further includes calculating a propagation delay between the first node and the second node based on the first phase reference, the second phase reference, the first phase-of-arrival, and the second phase-of-arrival.