Patent classifications
H04L9/065
Enhancement of flexibility to change STS index/counter for IEEE 802.15.4z
A method and apparatus of a first network entity in a wireless communication system is provide. The method and apparatus comprises: identifying at least one set of bit strings to generate a ranging scrambled timestamp sequence (STS); identifying at least one initialization vector (IV) field corresponding to the at least one set of bit strings, wherein the at least one IV field comprises a 4-octet string; generating a ranging STS key and IV information element (RSKI IE) that includes the at least one IV field to convey and align a seed that is used to generate the ranging STS; and transmitting, to a second network entity, the generated RSKI IE for updating the ranging STS of the second network entity.
COMMUNICATION METHOD AND APPARATUS
A first ECU performs an operation using a first key and a first fresh value to generate a keystream; performs an exclusive OR operation using the keystream and a to-be-transmitted first plaintext packet to generate a first ciphertext packet; and sends the first ciphertext packet to a second ECU. The first fresh value is a value generated by a counter in the first ECU when the first ECU transmits a packet, and the counter is configured to record a quantity of packets transmitted by the first ECU. The first ECU transmits the first ciphertext packet to the second ECU. This can prevent the first packet transmitted by the first ECU from being eavesdropped on, and help improve confidentiality of the packet transmitted by the first ECU.
DATA STORAGE DEVICE PERFORMING IN-STORAGE PROCESSING
A data storage device includes a nonvolatile memory device, a volatile memory device, a data encryption circuit configured to encrypt data outputted from the nonvolatile memory device, a data decryption circuit configured to decrypt encrypted data output from the data encryption circuit and configured to provide the decrypted data to the volatile memory device, and a processor configured to perform a first process that controls installation of a first in-storage program in the data storage device, a second process configured to manage a mapping table storing a relation between a logical address and a physical address of the nonvolatile memory device, and a third process configured to execute the first in-storage program.
METHOD AND DEVICE FOR ENCRYPTION OF VIDEO STREAM, COMMUNICATION EQUIPMENT, AND STORAGE MEDIUM
The present application provides a method and a device for encryption of a video stream, a communication equipment, and a storage media. The method for encryption of a video stream includes: acquiring a video stream, encrypting a data part of an I frame by using a first encryption algorithm to obtain a first encrypted data, and encrypting an encryption key of the first encrypted data by using a second encryption algorithm to obtain a second encrypted data, and storing the second encrypted data in a frame header of the I frame to obtain an encrypted I frame.
MEMORY SYSTEMS AND DEVICES INCLUDING EXAMPLES OF ACCESSING MEMORY AND GENERATING ACCESS CODES USING AN AUTHENTICATED STREAM CIPHER
Examples of systems and method described herein provide for accessing memory devices and, concurrently, generating access codes using an authenticated stream cipher at a memory controller. For example, a memory controller may use a memory access request to, concurrently, perform translation logic and/or error correction on data associated with the memory access request; while also utilizing the memory address as an initialization vector for an authenticated stream cipher to generate an access code. The error correction may be performed subsequent to address translation for a write operation (or prior to address translation for a read operation) to improve processing speed of memory access requests at a memory controller; while the memory controller also generates the encrypted access code.
Cryptographic Computer Machines with Novel Switching Devices
Operational n-state digital circuits and n-state switching operations with n and integer greater than 2 execute Finite Lab-transformed (FLT) n-state switching functions to process n-state signals provided on at least 2 inputs to generate an n-state signal on an output. The FLT is an enhancement of a computer architecture. Cryptographic apparatus and methods apply circuits that are characterized by FLT-ed addition and/or multiplication over finite field GF(n) or by addition and/or multiplication modulo-n that are modified in accordance with reversible n-state inverters, and are no longer known operations. Cryptographic methods processed on FLT modified machine instructions include encryption/decryption, public key generation, and digital signature methods including Post-Quantum methods. They include modification of isogeny based, NTRU based and McEliece based cryptographic machines.
Creating deterministic ciphertext using wide-block encryption
A computer-implemented method according to one embodiment includes compressing an uncompressed instance of data to create a compressed instance of data; encrypting the compressed instance of data utilizing wide-block encryption in response to determining that a size of the compressed instance of data is less than a predetermined threshold; and adding a zero pad to the encrypted compressed instance of data to create a ciphertext string.
ARTIFICIAL INTELLIGENCE (AI) BASED GARBLED SPEECH ELIMINATION
An AI-based approach to Garbled speech (GS) detection. Machine learning (ML) models are created that can distinguish between GS speech and non-GS speech with high accuracy. The machine learning models take as input an encoded speech frame that has passed a CRC check. The input data/predictors to the models are a selected set of information elements (IEs) (i.e., a set of one or more bits) of the encoded speech frame. The selected IEs are a part of the input parameters to the speech decoder. It is possible to operate on single encoded speech frames, in contrast to using decoded frames, which requires taking a previous encoded frame into account for being able to perform the decoding.
ENCRYPTION CIRCUIT RANDOMNESS INSPECTOR AND METHOD
A baseband processor of a communication device, the baseband processor including an encryptor block that encrypts a transmit data stream into an encrypted data stream, at least one transmit chain block that transforms the encrypted data stream into an analog transmit signal, and a randomness inspector unit that is in communication with the encryptor block, the randomness inspector unit accessing the transmit data stream and the encrypted data stream from the encryptor block as first and second input streams, respectively, to the randomness inspector unit, and determining a randomness gain by comparing a first randomness measurement associated with the first input stream to a second randomness measurement associated with the second input stream.
Methods and systems for secure command, control, and communications
In some aspects, an apparatus for encoding data for delivery to or for decoding data retrieved from a storage medium comprises a memory device and at least one hardware processor. The memory device is configured to store at least one parameter associated with at least one cryptographic protocol, the at least one parameter comprising one or more of a first cryptographic scheme, a first cryptographic key operation, a first cryptographic key length, and first cipher directives. The hardware processor is configured to generate a first frame comprising a first field for one parameter selected from the first cryptographic scheme, the first cryptographic key operation, the first cryptographic key length, and the first cipher directives and excluding fields for non-selected parameters, wherein the first frame is associated with the data delivered to or retrieved from the storage medium.