Patent classifications
H04L25/026
Scalable telecommunications system
One aspect is directed to a node unit for a scalable telecommunications system. The node unit is configured to have inserted therein a respective power amplifier module and duplexing module for each of a plurality universal digital RF transceiver modules. The node unit is configured to communicatively couple an input of each power amplifier module to an output of the respective universal digital RF transceiver module. The node unit is configured to communicatively couple each universal digital RF transceiver module to respective external equipment via a duplexing module. At least one module comprises a module identifier. The system controller is configured to read the at least one module identifier and to configure the operation of at least one of universal digital RF transceiver modules, universal digital transport interface modules, and universal backplane module based on the at least one module identifier.
EMBEDDED CLOCK IN DIGITAL COMMUNICATION SYSTEM
A digital receiver for decoding input data having three states includes a first input coupled to a first data line, a second input coupled to a second data line, a third input coupled to a third data line, and a fourth input coupled to a fourth data line. A first decoder is coupled to a first output, wherein the first decoder is for outputting first data signals in response to the sign of input data on the first data line minus input data on the second line. A second decoder is coupled to a second output, wherein the second decoder is for outputting second data signals in response to the sign of input data on the third data line minus input data on the fourth data line.
COMMUNICATION INTERFACE CIRCUIT SUPPORTING COMMUNICATION LINK CHANGE AND METHOD OF OPERATING SAME
A communication interface circuit includes a protocol layer circuit that generates packet data based on input data, and a physical layer circuit that encodes the packet data to output a transmission state, and drives a data lane including a plurality of three-phase wire links based on the transmission state, wherein the physical layer circuit may include an encoder that calculates the transmission state based on a preceding state output from the encoder in a previous unit interval, a symbol mapped to the packet data, and a control code, and wherein the control code instructs an encoding change based on a coupling relationship of the plurality of three-phase wire links. The communication interface circuit stably transmits data.
Transmission device, transmission method, and communication system
A transmission device of the present disclosure includes: a driver unit that transmits a data signal with use of a first voltage state, a second voltage state, and a third voltage state interposed between the first voltage state and the second voltage state, and is configured to make a voltage in the third voltage state changeable; and a controller that changes the voltage in the third voltage state to cause the driver unit to perform emphasis.
Systems and methods for providing power savings and interference mitigation on physical transmission media
Systems and methods for providing power savings and interference mitigation on physical transmission media are disclosed. Exemplary aspects include the ability to change physical layer (PHY) configurations based on operating conditions. By changing the PHY configuration, power consumption and electromagnetic interference (EMI) may be reduced. Still other operating conditions may be used to initiate switching between different PHYs. In another exemplary aspect, parameters of the PHY, such as slew rate, may be modified based on operating conditions to save power and/or reduce interference.
Closed-loop high-speed channel equalizer adaptation
A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an equalized data signal. A log detector circuit (300) receives the data signal and produces a power signal indicating a power level of the data signal. A decision circuit (332) receives the power signal and produces a select signal. A first selection circuit (336) receives a plurality of first correction signals and applies one of the first correction signals to the equalizer circuit in response to the select signal.
TRANSMITTING DEVICE FOR HIGH SPEED COMMUNICATION, AND INTERFACE CIRCUIT AND SYSTEM INCLUDING THE SAME
A transmitting device may include a logic circuit, a transmission controller, and a transmission driver. The encoder may generate transmission control signals based on control symbols. The transmission controller may generate driving control signals based on the transmission control signals. The transmission driver may drive a wire to one level among multiple levels, based on the driving control signals.
Multi-protocol analog front end circuit
An apparatus for processing an input signal from a memory includes an attenuator circuit and an analog front end (AFE) circuit. The attenuator circuit attenuates the input signal from the memory to produce an attenuated signal. The AFE circuit includes a first amplification stage and a second amplification stage. The first amplification stage has an n-type metal-oxide semiconductor (NMOS) transistor. The NMOS transistor has a gate that receives the attenuated signal from the attenuator circuit. The second amplification stage has a p-type metal-oxide semiconductor (PMOS) transistor. The PMOS transistor has a gate that receives the attenuated signal from the attenuator circuit. Outputs of the first amplification stage and the second amplification stage are electrically coupled to a common output of the AFE circuit.
Periodic communication method between at least one first system and at least one second system by means of a full-duplex synchronous serial link
The invention relates to a periodic communication method between at least one first system (2) and at least one second system (3) by means of a full-duplex synchronous serial link (4), wherein, during a communication period, data are exchanged between the first system (2) and the second system (3), including: at least one message from the first system (2) to the second system (3), at least one message from the second system (3) to the first system (2) and a clock signal, the clock signal being routed by the link (4) over a time interval, the amplitude of which is less than the communication period, the message from the first system (2) to the second system (3) and the message from the second system (3) to the first system (2) both being routed by the link (4) over said time interval.
SCALABLE TELECOMMUNICATIONS SYSTEM
One aspect is directed to a node unit for a scalable telecommunications system. The node unit is configured to have inserted therein a respective power amplifier module and duplexing module for each of a plurality universal digital RF transceiver modules. The node unit is configured to communicatively couple an input of each power amplifier module to an output of the respective universal digital RF transceiver module. The node unit is configured to communicatively couple each universal digital RF transceiver module to respective external equipment via a duplexing module. At least one module comprises a module identifier. The system controller is configured to read the at least one module identifier and to configure the operation of at least one of universal digital RF transceiver modules, universal digital transport interface modules, and universal backplane module based on the at least one module identifier.