H04L27/06

PAM-N receiver capable of adaptively adjusting threshold voltages determining level of data in received signal and method of adaptively adjusting threshold voltages of PAM-N receiver

A PAM-N receiver capable of adaptively adjusting threshold voltages determining a level of a received signal and a method of adaptively adjusting threshold voltages thereof are disclosed. According to the method of the present invention, the result of comparison between reference data levels and the level of data in the received signal are used to adjust the reference data levels, and the threshold voltages of a PAM-N receiver are adaptively calculated from the adjusted reference data levels, thereby reflecting transmission line conditions and Inter-Symbol Interference.

Synchronous detection apparatus, synchronous detection method, and program

A synchronization detection device includes: a correction unit configured to correct sampled data of a waveform on which a dither signal is superimposed, for each period of a reference signal in accordance with a period of the dither signal; a multiplication unit configured to multiply the corrected sampled data by a weight coefficient that is different for each level of the reference signal and associated with a timing of the reference signal; and an averaging unit configured to derive, as a detection result, an average of a result of the multiplication of the corrected sampled data by the weight coefficient.

SELF-CALIBRATING ON-OFF KEYING BASED DIGITAL ISOLATOR

In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.

Receiver filtering
11705988 · 2023-07-18 · ·

A receiver may include a first filter configured to generate a first estimation of a symbol of a received signal and a second filter configured to generate a second estimation of the symbol of the received signal. The receiver may also include a decoder configured to decode the symbol using one of the first estimation and the second estimation and a decision circuit configured to select one of the first estimation and the second estimation to provide to the decoder for decoding of the symbol based on a comparison of the first estimation to an estimation threshold.

Identifying Faulted Message Elements by Modulation Consistency in 5G/6G
20230224196 · 2023-07-13 ·

Disclosed is a method to demodulate messages according to two different modulation schemes in 5G and 6G, and thereby identifying which message elements are likely faulted. The two modulation schemes are QAM in which the signal is a sum of two orthogonal amplitude-modulated “branch” signals, and classical amplitude-phase modulation in which each message element's raw signal is both amplitude and phase modulated. The two schemes have similar information density but different noise sensitivities. Therefore, a receiver can compare the demodulated message using one modulation scheme to the same message demodulated according to the other modulation scheme, and flag any message elements that demodulate differently. In addition, one modulation scheme may be more effective than the other depending on conditions.

Message right management method, device and storage medium

A message right management method, and a device and storage medium for implementing the method, are provided. The message right management method includes obtaining a message created by a source user, and sending a message notification to a target user in a social platform. The method further includes verifying the target user when receiving a request for logging onto a message page from the target user, and controlling logon of the target user to the message page on the basis of a verification result. The method further includes, when receiving a service request of the target user with respect to the message, determining, based on a message right control policy, whether the target user has a right corresponding to a service requested by the service request, and controlling a response to the service request according to a determining result.

Receiver with coherent matched filter
11533159 · 2022-12-20 · ·

In one implementation, a receiver has a module to calculate the cross-correlation between a portion of a digital representation of a received signal and a reference signal. The receiver also has a module to generate an estimate of a portion of a message potentially included in the digital representation of the received signal and a screening module to determine the likelihood that the received signal includes a message. For a received signal that is determined likely to include a message, the receiver includes a carrier refinement module to shift the frequency of carrier pulses in the digital representation of the received signal toward a desired frequency and to align the phase of carrier pulses in the digital representation of the received signal with a desired phase and a coherent matched filter to recover the message from the digital representation of the received signal.

Receiver, communication apparatus, method and computer program for receiving an amplitude shift keyed signal

A method of a receiver is used for receiving an amplitude shift keyed signal provided over a multi-layered transmission from a plurality of antennas with different precoding of different symbols for the respective layers. The method comprises receiving a sequence of signal values of the signal, estimating, from the sequence of signal values, channels for the respective layers, and selecting one of a plurality of detection methods based on a difference in quality between the estimated channels A receiver and a computer program are also disclosed.

Receiver, communication apparatus, method and computer program for receiving an amplitude shift keyed signal

A method of a receiver is used for receiving an amplitude shift keyed signal provided over a multi-layered transmission from a plurality of antennas with different precoding of different symbols for the respective layers. The method comprises receiving a sequence of signal values of the signal, estimating, from the sequence of signal values, channels for the respective layers, and selecting one of a plurality of detection methods based on a difference in quality between the estimated channels A receiver and a computer program are also disclosed.

PAM-4 RECEIVER WITH JITTER COMPENSATION CLOCK AND DATA RECOVERY
20220385444 · 2022-12-01 ·

A PAM-4 receiver with jitter compensation clock and data recovery is provided. The receiver includes a first-order delay-locked loop (DLL) which employs a bang-bang phase detector (BBPD) and a voltage-controlled delay line (VCDL) circuit supporting 40 MHz jitter tracking bandwidth and static phase skew elimination. A second-order wideband phase-locked loop (WBPLL) using the ¼-rate reference clock provides multi-phase clock generation with low input-to-output latency. To suppress the consequent jitter transfer, a jitter compensation circuit (JCC) acquires the jitter transfer amplitude and frequency information by detecting the DLL loop filter voltage (VLF(s)) signal, and generates an inverted loop filter voltage signal, denoted as VLF.sub.INV(s). The VLF.sub.INV(S) modulates a group of complementary VCDLs (C-VCDLs) to attenuate the jitter transfer on both recovered clock and data. With the provided receiver, a jitter compensation ratio up to 60% can be supported from DC to 4 MHz, with a −3-dB corner frequency of 40 MHz.