Systems and techniques for communicating data as a function of frequency are presented. In an implementation, a system includes a microelectromechanical systems (MEMS) sensor, a digital signal processor and a frequency detection circuit. The digital signal processor is coupled to the MEMS sensor. The frequency detection circuit receives data encoded as a function of frequency from the digital signal processor via a clock communication channel.

Systems and techniques for communicating data as a function of frequency are presented. In an implementation, a system includes a microelectromechanical systems (MEMS) sensor, a digital signal processor and a frequency detection circuit. The digital signal processor is coupled to the MEMS sensor. The frequency detection circuit receives data encoded as a function of frequency from the digital signal processor via a clock communication channel.

A phase detection system includes first and second phase mixing circuits in signal communication with a signal phase adjuster module. The first mixing circuit generates a first digital modulated frequency signal based on an input signal and a first reference phase signal. The second mixing circuit generates a second digital modulated frequency signal based on the input signal and a second reference phase signal, which phase shifted with respect to the first reference phase signal. The phase detection system further includes a phase identification (ID) module in signal communication with the first mixing circuit and the second mixing circuit. The phase ID module generates a phase signal based on the first digital modulated frequency signal and the second digital modulated frequency signal. The phase signal indicates a phase of the input signal.

A phase detection system includes first and second phase mixing circuits in signal communication with a signal phase adjuster module. The first mixing circuit generates a first digital modulated frequency signal based on an input signal and a first reference phase signal. The second mixing circuit generates a second digital modulated frequency signal based on the input signal and a second reference phase signal, which phase shifted with respect to the first reference phase signal. The phase detection system further includes a phase identification (ID) module in signal communication with the first mixing circuit and the second mixing circuit. The phase ID module generates a phase signal based on the first digital modulated frequency signal and the second digital modulated frequency signal. The phase signal indicates a phase of the input signal.

The present invention relates to a method of simultaneously performing packet detection, symbol timing acquisition, and carrier frequency offset estimation in parallel using multiple correlation detection and a Bluetooth apparatus using the same, in which the Bluetooth apparatus receiving a frequency modulated signal includes a frequency demodulating unit converting the received signal into a similar amplitude modulated signal; and multiple correlation detectors generating multiple correlation indices from the converted signal, on a basis of an access address received from a link layer and a plurality of carrier frequency offset search windows. According to the present invention, since packet detection, symbol timing acquisition and carrier frequency offset estimation are simultaneously performed in parallel in the relatively long access address reception interval instead of the short preamble signal reception interval.

A shift control circuit includes a first limiter circuit, a phase shifter, a first suppressor, and a reducer. The first limiter circuit limits the amplitude of a control target signal input from a microphone, having undergone A-D conversion by an A-D convener, and frequency differentiation by a pre-emphasis circuit, and having the relative intensity of harmonic components increased. The phase shifter performs, for the control target signal having undergone the amplitude limitation, phase shift on the frequency component within a first frequency range. The first suppressor suppresses, for the control target signal having undergone the phase shift, the frequency component equal to or greater than a second threshold. The reducer suppresses, for the control target signal having the suppressed frequency component, the frequency component within a second frequency range, and outputs as an information signal. A modulator performs frequency modulation on a carrier wave in accordance with the information signal, and a transmitter produces a transmission signal from the carrier wave having undergone the frequency modulation, and transmits the transmission signal via an antenna.

A shift control circuit includes a first limiter circuit, a phase shifter, a first suppressor, and a reducer. The first limiter circuit limits the amplitude of a control target signal input from a microphone, having undergone A-D conversion by an A-D convener, and frequency differentiation by a pre-emphasis circuit, and having the relative intensity of harmonic components increased. The phase shifter performs, for the control target signal having undergone the amplitude limitation, phase shift on the frequency component within a first frequency range. The first suppressor suppresses, for the control target signal having undergone the phase shift, the frequency component equal to or greater than a second threshold. The reducer suppresses, for the control target signal having the suppressed frequency component, the frequency component within a second frequency range, and outputs as an information signal. A modulator performs frequency modulation on a carrier wave in accordance with the information signal, and a transmitter produces a transmission signal from the carrier wave having undergone the frequency modulation, and transmits the transmission signal via an antenna.

According to an aspect, there is provided a method for transmitting a low-power radio signal, comprising: transmitting, by a radio device, a data radio signal by using binary frequency-shift-keying modulation introducing a phase change between consecutive bit intervals in the data radio signal; and transmitting, by the radio device, a wake-up radio signal using the binary frequency-shift-keying modulation where repetition coding is applied before the frequency-shift-keying to eliminate the phase change between consecutive bit intervals in the wake-up radio signal.

According to an aspect, there is provided a method for transmitting a low-power radio signal, comprising: transmitting, by a radio device, a data radio signal by using binary frequency-shift-keying modulation introducing a phase change between consecutive bit intervals in the data radio signal; and transmitting, by the radio device, a wake-up radio signal using the binary frequency-shift-keying modulation where repetition coding is applied before the frequency-shift-keying to eliminate the phase change between consecutive bit intervals in the wake-up radio signal.

This receiving apparatus achieves circuit size reduction and consumption power reduction, while still having an advantage of high-speed processing. In a receiving apparatus (100), a frequency component detector (105) has a Fourier conversion operation unit provided therein, and performs high-speed Fourier conversion with respect to digital signals outputted from an ADC (104), said high-speed Fourier conversion being performed within a range instructed by means of an operation range control unit (106), and the frequency component detector detects a plurality of frequency components (FFT signals) of the digital signals. The operation range control unit (106) sets, using the FFT signals outputted from the frequency component detector (105), the frequency range within which the Fourier conversion operation is to be performed, and instructs the range to the frequency component detector (105).