In one embodiment, a first chiplet includes: a plurality of agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet; a die-to die bridge to couple the first chiplet to a second chiplet; a fabric coupled to the die-to-die bridge to route communications between the plurality of agents, where a first agent is to generate a first message having a first destination port identifier; and a first fabric adapter coupled to the first agent, the first fabric adapter to direct the first message to the die-to-die bridge when the first portion of the first destination port identifier identifies a second chiplet as the destination chiplet. Other embodiments are described and claimed.

In one embodiment, a first chiplet includes: a plurality of agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet; a die-to die bridge to couple the first chiplet to a second chiplet; a fabric coupled to the die-to-die bridge to route communications between the plurality of agents, where a first agent is to generate a first message having a first destination port identifier; and a first fabric adapter coupled to the first agent, the first fabric adapter to direct the first message to the die-to-die bridge when the first portion of the first destination port identifier identifies a second chiplet as the destination chiplet. Other embodiments are described and claimed.

Methods, systems, and computer programs are presented for processing Ethernet packets at a Field Programmable Gate Array (FPGA). One programmable integrated circuit includes: an internal network on chip (iNOC) comprising rows and columns; clusters, coupled to the iNOC, comprising a network access point (NAP) and programmable logic; and an Ethernet controller coupled to the iNOC. When the controller operates in packet mode, each complete inbound Ethernet packet is sent from the controller to one of the NAPs via the iNOC, where two or more NAPs are configurable to receive the complete inbound Ethernet packets from the controller. The controller is configurable to operate in quad segment interface (QSI) mode where each complete inbound Ethernet packet is broken into segments, which are sent from the controller to different NAPs via the iNOC, where two or more NAPs are configurable to receive the complete inbound Ethernet packets from the controller.

A network comprising interconnected first and second processors, each processor comprising one or more of: multiple processing units arranged on a chip configured to execute program code; an on-chip interconnect comprising groups of exchange paths connected to receive data from corresponding groups of the processing units; external interfaces configured to communicate data off-chip as packets, each having a destination address, external interfaces of the first and second processors being connected by an external link; multiple exchange blocks, each connected to groups of the exchange paths; a routing bus configured to route packets between the exchange blocks and the external interfaces. Processing units of the first processor generate off-chip packets such that the group of processing units serviced by the first exchange block on the first processor address off-chip packets to the group of processing units on the second processor serviced by the corresponding first exchange block of the second processor.

A network comprising interconnected first and second processors, each processor comprising one or more of: multiple processing units arranged on a chip configured to execute program code; an on-chip interconnect comprising groups of exchange paths connected to receive data from corresponding groups of the processing units; external interfaces configured to communicate data off-chip as packets, each having a destination address, external interfaces of the first and second processors being connected by an external link; multiple exchange blocks, each connected to groups of the exchange paths; a routing bus configured to route packets between the exchange blocks and the external interfaces. Processing units of the first processor generate off-chip packets such that the group of processing units serviced by the first exchange block on the first processor address off-chip packets to the group of processing units on the second processor serviced by the corresponding first exchange block of the second processor.

A communication system includes remote units to exchange radio frequency (RF) signals with mobile devices, at least some of the RF signals comprising information destined for, or originating from, a mobile device. The communication system also includes a controller comprising one or more modems and connected to an external network, at least one of the modems being a baseband modem and being configured to pass first data corresponding to the information. The controller is separated from the remote units by an intermediate network over which second data corresponding to the information is carried in frames between the controller and the remote units. The second data comprises baseband data, and at least some of the baseband data is compressed in a frequency domain. The remote units and the controller are configured to compress the baseband data for transmission over the intermediate network.

A communication system includes remote units to exchange radio frequency (RF) signals with mobile devices, at least some of the RF signals comprising information destined for, or originating from, a mobile device. The communication system also includes a controller comprising one or more modems and connected to an external network, at least one of the modems being a baseband modem and being configured to pass first data corresponding to the information. The controller is separated from the remote units by an intermediate network over which second data corresponding to the information is carried in frames between the controller and the remote units. The second data comprises baseband data, and at least some of the baseband data is compressed in a frequency domain. The remote units and the controller are configured to compress the baseband data for transmission over the intermediate network.

A switching system comprises a controlling switch and a plurality of port extenders. One of the port extenders includes: at least one upstream port; multiple downstream ports; and a forwarding engine. A forwarding database is populated with entries indicating associations between i) respective network addresses corresponding to devices coupled to downstream ports, and ii) respective local downstream ports. The forwarding database excludes entries corresponding to network addresses corresponding to devices coupled to the at least one upstream port. The forwarding engine is configured to: for a first packet received via one of the local downstream ports, and having a destination network address in the forwarding database, forward the first packet to a different local downstream port indicated by the forwarding database. For a second packet received via one of the local downstream ports, and having a destination network address not in the forwarding database, forward the second packet to the at least one upstream port.

A switching system comprises a controlling switch and a plurality of port extenders. One of the port extenders includes: at least one upstream port; multiple downstream ports; and a forwarding engine. A forwarding database is populated with entries indicating associations between i) respective network addresses corresponding to devices coupled to downstream ports, and ii) respective local downstream ports. The forwarding database excludes entries corresponding to network addresses corresponding to devices coupled to the at least one upstream port. The forwarding engine is configured to: for a first packet received via one of the local downstream ports, and having a destination network address in the forwarding database, forward the first packet to a different local downstream port indicated by the forwarding database. For a second packet received via one of the local downstream ports, and having a destination network address not in the forwarding database, forward the second packet to the at least one upstream port.

Some embodiments provide a network forwarding IC with packet processing pipelines, at least one of which includes a parser, a set of match-action stages, and a deparser. The parser is configured to receive a packet and generate a PHV including a first number of data containers storing data for the packet. A first match-action stage is configured to receive the PHV from the parser and expand the PHV to a second, larger number of data containers storing data for the packet. Each of a set of intermediate match-action stage is configured to receive the expanded PHV from a previous stage and provide the expanded PHV to a subsequent stage. A final match-action stage is configured to receive the expanded PHV and reduce the PHV to the first number of data containers. The deparser is configured to receive the reduced PHV from the final match-action stage and reconstruct the packet.