Patent classifications
H04L49/3045
Apparatus and method for rate management and bandwidth control
A data rate management system that provides quality of service at the fine granularity of applications in the home network and home automation environment is provided. An application can be associated with a dynamic traffic flow, a physical port, a logical interface, or a host computer or device. Virtual queueing is applied to isolate and protect individual applications. Comprehensive rate management algorithms are developed to offer the bandwidth guarantee for the applications individually. The data rate management system includes a traffic classifier, virtual queueing, and a rate manager. The traffic classifier can statically or dynamically identify an application. The identified application is stored in a dedicated virtual queue. The rate manager schedules the packet transmission among virtual queues using the application-based traffic profiles.
Data Communication Method And Apparatus
The invention provides a data communication method, including: sending, by the first electrical node, request information to an electrical node, where the request information is used to request an expected data volume quota of a first VOQ, and the first VOQ stores at least one first data packet to be sent to the electrical node; receiving response information, where the response information includes a target data volume quota; and sending the at least one first data packet to the electrical node via the at least one optical node based on the target data volume quota.
TASK ACTIVATING FOR ACCELERATED DEEP LEARNING
Techniques in advanced deep learning provide improvements in one or more of accuracy, performance, and energy efficiency. An array of processing elements performs flow-based computations on wavelets of data. Each processing element has a compute element and a routing element. Each router enables communication via wavelets with at least nearest neighbors in a 2D mesh. Routing is controlled by virtual channel specifiers in each wavelet and routing configuration information in each router. Execution of an activate instruction or completion of a fabric vector operation activates one of the virtual channels. A virtual channel is selected from a pool comprising previously activated virtual channels and virtual channels associated with previously received wavelets. A task corresponding to the selected virtual channel is activated by executing instructions corresponding to the selected virtual channel.
MANAGING VIRTUAL OUTPUT QUEUES
A first node of a packet switched network transmits at least one flow of protocol data units of a network to at least one output context of one of a plurality of second nodes of the network. The first node includes X virtual output queues (VOQs). The first node receives, from at least one of the second nodes, at least one fair rate record. Each fair rate record corresponds to a particular second node output context and describes a recommended rate of flow to the particular output context. The first node allocates up to X of the VOQs among flows corresponding to i) currently allocated VOQs, and ii) the flows corresponding to the received fair rate records. The first node operates each allocated VOQ according to the corresponding recommended rate of flow until a deallocation condition obtains for the each allocated VOQ.
Fabric Vectors for Deep Learning Acceleration
Techniques in advanced deep learning provide improvements in one or more of accuracy, performance, and energy efficiency. An array of processing elements performs flow-based computations on wavelets of data. Each processing element has a respective compute element and a respective routing element. Instructions executed by the compute element include operand specifiers, some specifying a data structure register storing a data structure descriptor describing an operand as a fabric vector or a memory vector. The data structure descriptor further describes various attributes of the fabric vector: length, microthreading eligibility, number of data elements to receive, transmit, and/or process in parallel, virtual channel and task identification information, whether to terminate upon receiving a control wavelet, and whether to mark an outgoing wavelet a control wavelet.
Dual port storage device emulation
Techniques are provided for dual port storage device emulation. A switch is configured with a first virtual switch to provide a first computing device with access a first single port device through a first port and a second port. The switch is configured with a second virtual switch to provide a second computing device with access to a second single port device through a third port and a fourth port. In response to determining that the first computing device has experienced a failure, the first virtual switch and the second virtual switch are reconfigured to provide the second computing device with access to the first single port device through the second port and access to the second single port device through the fourth port. The first computing device is disconnected from accessing the first single port device through the first virtual switch.
ALLOCATION OF VIRTUAL QUEUES OF A NETWORK FORWARDING ELEMENT
In a method for allocating physical queues of a network forwarding element, a request is received at the network forwarding element, the network forwarding element including a plurality of physical queues, where each physical queue of the plurality of physical queues has a fixed bandwidth, the request identifying an allocation of a plurality of virtual queues at the network forwarding element. Based at least in part on the request, a configuration of the plurality of physical queues to the plurality of virtual queues is determined. The plurality of physical queues is configured according to the configuration, wherein the configuring includes allocating at least two physical queues to a virtual queue.
Configurable network-on-chip for a programmable device
An example programmable integrated circuit (IC) includes a processor, a plurality of endpoint circuits, a network-on-chip (NoC) having NoC master units (NMUs), NoC slave units (NSUs), NoC programmable switches (NPSs), a plurality of registers, and a NoC programming interface (NPI). The processor is coupled to the NPI and is configured to program the NPSs by loading an image to the registers through the NPI for providing physical channels between NMUs to the NSUs and providing data paths between the plurality of endpoint circuits.
Server-side path selection in multi virtual server environment
Embodiments describe an approach for improving path selection in multi-virtual input/output sever environment. Embodiments, send one or more inquiry commands to one or more virtual input/output server's (VIOSs). Further, embodiments, receive one or more server-side cache properties from the one or more VIOSs. Additionally, embodiments, determine one or more preferred paths based on the one or more server-side cache properties, and perform one or more input/output's (I/O's) on the one or more preferred paths.
Congestion avoidance in multipath routed flows using virtual output queue statistics
Disclosed are techniques regarding interfaces, each configured to output network packets. The techniques can regard a memory for storing multipath groups, virtual output queues, and a histogram table for storing statistical information associated with network packets to be output by interfaces. The techniques can include generating a shared-interface list including a member that represents a union of interfaces of at least some of the multipath groups, wherein the multipath groups of the member share at least one of the interfaces. The techniques can include associating the histogram table with the member. The techniques can include collecting the statistical information pertaining to network packets indicated by information stored in one of the virtual output queues, populating the histogram table with the statistical information, and determining that one of the interfaces is congested based on the statistical information.